A summary of the software support provided for digital to analogue converter (DAC) and analogue to digital converter (ADC) subsystems in particular.
C.1 DAC Peripheral Features
DAC channels
The device integrates two 12-bit DACs that can be used independently or simultaneously (dual mode).
DAC triggers
DAC conversion can be non-triggered when the related output is available once data is written to the register.
DAC conversion can be triggered by:
An external event using a related input pin.
A timer generated event.
Using a software command.
DAC buffer mode feature
Each DAC channel integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly without having to add an external operational amplifier. The device data sheet gives more details about the impedance value that can be achieved.
DAC wave generation feature
Both DAC channels can be used to generate:
A pseudo-random Noise waveform,
A Triangle waveform.
DAC data format
The DAC data format can be:
8-bit right alignment,
12-bit left alignment,
12-bit right alignment.
DAC data value to voltage correspondence
The analogue output voltage on each DAC channel pin is determined by the following equation:
where DOR is the DAC Data Register and VEF+ is the input reference voltage, typically 3.3 V on the Discovery board. The device data sheet explains other options.
DMA requests
When enabled a direct memory access (DMA) request can be generated when an external trigger (but not a software trigger) occurs. DMA requests are mapped to specific stream and channel configurations.
C.2 How to Use the DAC Driver
The following sequence of operations is always needed to set up the DAC.
DAC APB (advanced peripheral bus) clock must be enabled to get write access to DAC registers using the function:
Configure the related outputs (DAC_OUT1: GPIOA_4 or DAC_OUT2: GPIOA_5) in analogue mode.
Configure the chosen DAC channel using the DAC_Init() function
Choose between possible timer sources, software or none for DAC_Trigger.
Select between none, noise or triangle by setting DAC_WaveGeneration.
Specify the LFSR number of bits for noise wave generation or the maximum triangle amplitude in DAC_LFSRUnmask_TriangleAmplitude, see stm32f4xx_dac.h for the range of values permitted.
Specify whether the output buffer is ENABLED or DISABLED in DAC_OutputBuffer.
Enable the chosen DAC channel using the DAC_Cmd(DACx, ENABLE) function.
When these steps are completed the DAC peripheral should be fully operational.
C.3 ADC Peripheral Features
Regular channels group configuration
These functions allow the user to configure the ADC and its channels group features.
Activate the continuous mode.
Configure and activate the Discontinuous mode.
Read the ADC converted values.
Multi mode ADCs Regular channels configuration
Refer to ‘Regular channels group configuration’ description to configure the ADC1, ADC2 and ADC3 regular channels.
Select the multi-mode ADC regular channels features (dual or triple mode)
Read the ADCs converted values as a group.
DMA for Regular channels group features configuration allows the user to:
Enable the DMA mode for a regular channel group,
Enable the generation of DMA requests continuously at the end of the last DMA transfer.
Injected channels group configuration allows the user to:
Configure the ADC Injected channels group features.
Activate the Continuous mode.
Activate the Injected Discontinuous mode.
Activate the Auto-Injected mode.
Read the ADC converted values.
C.4 How to Use the ADC driver
This sequence of operations will always be needed to setting up the ADC.
Enable the clock for the ADC’s group of GPIO pins using the function: RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOx, ENABLE);
Configure these ADC pins in analogue mode
Configure the ADC Common features
Select one of the 13 possible modes as ADC_Mode
Select the ADC prescaler from one of the four (2, 4, 6 or 8) possible ratios in ADC_Prescaler
Select the DMA transfer format from the three alternatives or disabled in ADC_DMAAccessMode
Configure the ADC delay between two sampling phases from the range between 5 and 20 cycles ADC_TwoSamplingDelay.
Configure the ADC individual features
Select the ADC bit resolution from 12, 10, 8 or 6 in ADC_Resolution
Specify whether the conversion is to be performed in scan (multichannel) or single channel mode by setting ENABLE or DISABLE in ADC_ScanConvMode
Choose between single (DISABLE) or continuous conversion (ENABLE) for the parameter ADC_ContinuousConvMode
Select ADC external trigger edge for regular channel conversion from none, rising, falling or rising and falling in ADC_ExternalTrigConvEdge
Configure the ADC external trigger sources for regular channel conversion from a selection of timers, capture/compare and external trigger sources in ADC_ExternalTrigConv
Select from right or left alignment in ADC_DataAlign
Select the number of conversions that will be performed in the sequencer for a regular channel group, this must be between 1 and 16, in ADC_Nbr OfConversion.
Activate the ADC peripheral by using ADC_Cmd(ADCx, ENABLE).
When all these steps have been taken the ADC should be ready to perform conversions when triggered.