Tab. 2.1Switching sequence of the two-level inverter.
Tab. 2.2Switching times of the two-level inverter.
Tab. 3.1Switching states of the six-level diode-clamped inverter.
Tab. 4.1Switching states of the three-level inverter.
Tab. 4.2Switching times of the three-level inverter.
Tab. 4.3Switching states of the three-level inverter.
Tab. 4.4Performance of the two- and three-level inverters.
Tab. 4.5Performance of inverters with respect to modulation index.
Tab. 5.1Switching states of the three-level inverter.
Tab. 5.2Switching states of the five-level inverter.
Tab. 5.3Performance of the three- and five-level inverters.
Tab. 6.1Location of the reference vector and corrected duty cycles.
Tab. 6.2Switching sequence of the seven-level inverter.
Tab. 7.1Switching states and current path for the seven-level inverter.
Tab. 7.2Selection of hexagon based on the reference angle (θ).
Tab. 7.3First correction of the reference voltage vector.
Tab. 7.4Second correction of the reference voltage vector.
Tab. 7.5Third correction of the reference voltage vector.
Tab. 8.1Classification of voltage vectors.
Tab. 8.2Classification of the three-level inverter switching states.
Tab. 8.3Switching sequence of A2, A3, and A4 regions.
Tab. 8.4Switching sequence of the three-level inverter in sector I.
Tab. 8.5Classification of the eleven-level inverter switching states.
Tab. 8.6Switching sequence of the eleven-level inverter in sector I.