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SECTION II Nano-CMOS Technology
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SECTION II Nano-CMOS Technology
by Krzysztof Iniewski, James E. Morris
Nanoelectronic Device Applications Handbook
Cover
Half Title
Title Page
Copyright Page
Table of Contents
Foreword
Preface
Editors
Contributors
SECTION I Nano-CMOS Modeling
Chapter 1 Validation of Nano-CMOS Predictive Technology Model Tool on NanoHUB.org
Chapter 2 Comparative Analysis of Mobility and Dopant Number Fluctuation Models for the Threshold Voltage Fluctuation Estimation in 45 nm Channel Length MOSFET Device
Chapter 3 Impact of Random Interface Traps on Asymmetric Characteristic Fluctuation of 16-nm-Gate MOSFET Devices
SECTION II Nano-CMOS Technology
Chapter 4 Bottom-Up Approaches for CMOS Scaling in the Nanoscale Era
Chapter 5 Study of Lanthanum Incorporated HfO2 Nanoscale Film Deposited as an MOS Device Structure Using a Dense Plasma Focus Device
Chapter 6 Low-Power Reliable Nano Adders
SECTION III Nano Capacitors
Chapter 7 Package-Compatible High-Density Nano-Scale Capacitors with Conformal Nano-Dielectrics
Chapter 8 Modified Carbon Nanostructures for Display and Energy Storage
Chapter 9 Production and Characterization of Nanoparticle Dispersions of Organic Semiconductors for Potential Applications in Organic Electronics
Chapter 10 Investigation of Charge Accumulation in Si3N4/SiO2 Dielectric Stacks for Electrostatically Actuated NEMS/MEMS Reliability
SECTION IV Terahertz Systems and Devices
Chapter 11 Nano Antennas for Energy Conversion
Chapter 12 Ballistic Transistor Logic for Circuit Applications
SECTION V Single-Electron Transistors and Electron Tunneling Devices
Chapter 13 Simultaneously Controlled Tuning of Tunneling Properties of Integrated Nanogaps Using Field-Emission-Induced Electromigration
Chapter 14 High-Resistive Tunnel Junctions for Room-Temperature-Operating Single- Electron Transistors Fabricated Using Chemical Oxidation of Tungsten Nanoparticles
Chapter 15 Axon-Inspired Communication Systems
Chapter 16 Electromechanical Modeling of GNP Nanocomposites for Integrated Stress Monitoring of Electronic Devices
SECTION VI Quantum Cellular Automata
Chapter 17 An HDL Model of Magnetic Quantum-Dot Cellular Automata Devices and Circuits
Chapter 18 Restoring Divider Design for Quantum-Dot Cellular Automata
Chapter 19 LINA-QCA: Theory, Design, and Viable Implementation Strategies
Chapter 20 Minimal Majority Gate Mapping of Four-Variable Functions for Quantum-Dot Cellular Automata
SECTION VII Memristors, Resistive Switches, and Memory
Chapter 21 Nanodevices: Describing Function and Liénard Equation
Chapter 22 Sensing and Writing Operations of Nano-Crossbar Memory Arrays
Chapter 23 Modeling of Complementary Resistive Switches
Chapter 24 Hybrid Design of a Memory Cell Using a Memristor and Ambipolar Transistors
Chapter 25 Spike Timing-Dependent Plasticity Using Memristors and Nano-Crystalline Silicon TFT Memories
Chapter 26 Thermally Actuated Nanoelectromechanical Memory: A New Memory Concept for Spacecraft Application
SECTION VIII Graphene Preparation and Properties
Chapter 27 Low-Stress Transfer of Graphene and Its Tunable Resistance by Remote Plasma Treatments in Hydrogen
Chapter 28 High-Yield Dielectrophoretic Deposition and Ion Sensitivity of Graphene
Chapter 29 Multilayer Graphene Grid and Nanowire Fabrication and Printing
SECTION IX Graphene Devices
Chapter 30 Nanotransistors Using Graphene Interfaced with Advanced Dielectrics for High-Speed Communication
Chapter 31 Graphene-on-Diamond Devices and Interconnects: Carbon sp2-on-sp3 Technology
Chapter 32 Graphene Band Gap Modification via Functionalization with Metal-Bis-Arene Molecules
SECTION X Carbon Nanotube Applications
Chapter 33 Integrating Low-Temperature Carbon Nanotubes as Vertical Interconnects in Si Technology
Chapter 34 Readout Circuit Design for MWCNT Infrared Sensors
Chapter 35 Use of Vertically Aligned Carbon Nanotubes for Electrochemical Double- Layer Capacitors
Chapter 36 Spray Deposition of Carbon Nanotube Thin Films
Chapter 37 Electrical Control of Synthesis Conditions for Locally Grown CNTs on a Polysilicon Microstructure
SECTION XI Carbon Nanotube Transistor Modeling
Chapter 38 A Qualitative Comparison of Energy Band Gap Equations with a Focus on Temperature and Its Effect on CNTFETs
Chapter 39 Real-Time Quantum Simulation of Terahertz Response in Single-Walled Carbon Nanotube
SECTION XII Carbon Nanotube Transistor Fabrication
Chapter 40 Fabrication of Stable n-Type Thin-Film Transistor with Cs Encapsulated Single-Walled Carbon Nanotubes
Chapter 41 Printing Technology and Advantage of Purified Semiconducting Carbon Nanotubes for Thin Film Transistors
SECTION XIII Random CNT Network Transistors
Chapter 42 Solution-Processed Random Carbon Nanotube Networks Used in a Thin-Film Transistor
Chapter 43 Analysis of Yield Improvement Techniques for CNFET-Based Logic Gates
Chapter 44 Low-Power and Metallic-CNT-Tolerant CNTFET SRAM Design
SECTION XIV Nano-Redundant Systems
Chapter 45 Optimized Built-In Self-Test Technique for CAEN-Based Nanofabric Systems
Chapter 46 Adaptive Fault-Tolerant Architecture for Unreliable Device Technologies
SECTION XV Nanowire Fabrication
Chapter 47 Growth and Characterization of GaAs Nanowires Grown on Si Substrates
Chapter 48 Synthesis and Characterization of n- and p-Doped Tin Oxide Nanowires for Gas Sensing Applications
Chapter 49 Cu Silicide Nanowires: Fabrication, Characterization, and Application to Li-Ion Batteries
Chapter 50 High-Aspect-Ratio Metallic Nanowires by Pulsed Electrodeposition
SECTION XVI Nanowire Applications
Chapter 51 Zinc Oxide Nanowires for Biosensing Applications
Chapter 52 Aqueous Synthesis of n-/p-type ZnO Nanorods on Porous Silicon for the Application of p–n Junction Device
Chapter 53 High Surface-Enhanced Raman Scattering (SERS) as an Analytical Tool Using Silver Nanoparticles on GaN Nanowires
SECTION XVII Nanowire Transistors
Chapter 54 High-Speed and Transparent Nanocrystalline ZnO Thin Film Transistors
Chapter 55 First-Principle Study of Energy-Band Control by Cross-Sectional Morphology in [110]-Si Nanowires
Chapter 56 Interplay of Self-Heating and Short-Range Coulomb Interactions due to Traps in a 10 nm Channel Length Nanowire Transistor
Chapter 57 Impact of Phonon Scattering in an Si GAA Nanowire FET with a Single Donor in the Channel
Chapter 58 Modeling and Minimizing Variations of Gate-All-Around Multiple-Channel Nanowire TFTs
Chapter 59 Characterization of Gate-All-Around Si-Nanowire Field-Effect Transistor: Extraction of Series Resistance and Capacitance–Voltage Behavior
SECTION XVIII Nanomagnetic Logic
Chapter 60 Nonvolatile Logic-in-Memory Architecture: An Integration between Nanomagnetic Logic and Magnetoresistive RAM
Chapter 61 Implementation of a Nanomagnet Full Adder Circuit
Chapter 62 Investigations on Nanomagnetic Logic by Experiment-Based Compact Modeling
Chapter 63 Parallel Energy Minimizing Computation via Dipolar Coupled Single Domain Nanomagnets
SECTION XIX Spintronics
Chapter 64 On Physical Limits and Challenges of Graphene Nanoribbons as Interconnects for All-Spin Logic
Chapter 65 Influence of Impurity and Dangling Bond Scattering on the Conductance Anomalies of Side-Gated Quantum Point Contacts
Chapter 66 Electric Field-Controlled Spin Interactions in Quantum Dot Molecules
Chapter 67 Material Issues for Efficient Spin-Transfer Torque RAMs
SECTION XX Nanodevice Modeling
Chapter 68 Atomic-Scale Modeling of Nanoscale Devices
Index
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Chapter 3 Impact of Random Interface Traps on Asymmetric Characteristic Fluctuation of 16-nm-Gate MOSFET Devices
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Chapter 4 Bottom-Up Approaches for CMOS Scaling in the Nanoscale Era
Section II
Nano-CMOS Technology
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