Op amp circuitry is analog circuitry and very different from digital circuitry. It must be partitioned in its own section of the board, using special layout techniques.

Printed circuit board effects become most apparent in high speed analog circuits, but common mistakes described in this chapter can even affect the performance of audio circuits. The purpose of this chapter is to discuss some of the more common mistakes made by designers and how they degrade performance and to provide simple fixes to avoid the problems.

In all but very rare cases, the PCB layout for analog circuitry must be designed such that the effect of the PCB is transparent to the circuit. Any effect caused by the PCB itself should be minimized so that the operation of the analog circuitry in production is the same as the performance of the design and prototype.

Normal design cycles, particularly of large digital boards, dictate laying out of the PCB as soon as possible. The digital circuitry has been simulated, but in most cases, the production PCB itself is the prototype and may even be sold to a customer. Digital designers can correct small mistakes by implementing cuts and jumpers, reprogramming gate arrays or flash memories, and going on to the next project. This is not the case with analog circuitry. Some of the common design mistakes discussed in this chapter cannot be corrected by the cut and jumper method. They render the entire PCB unusable. It is very important for the digital designer, who is used to cuts and jumpers, to read and understand this chapter prior to releasing a board to a layout service.

A little care, taken up front, can save a board worth thousands of dollars from becoming scrap because of blunders in a tiny section of analog circuitry. This author has been the unfortunate recipient of a simple analog circuit designed by another engineer, who was accustomed to the cut and jumper method of correcting his mistakes. This resulted in a design that was full of mistakes. Not only was the op amp hooked up with inverting and noninverting inputs reversed, but an RC time constant had to be added to prevent a race condition. Repercussions from these mistakes and associated rework problems actually caused hundreds of hours to be lost from a tight production schedule. Prototyping this circuit would have taken less than a day. Prototype all analog circuitry!

Noise is the primary limitation on analog circuitry performance. Internal op amp noise is covered in Chapter 12. Other types of noise include

Printed circuit board materials are available in various grades, as defined by the National Electrical Manufacturers Association (NEMA). It would be very convenient for designers if this organization were closely allied with the electronics industry, controlling parameters such as the resistivity and dielectric constant of the material. Unfortunately, that is not the case. NEMA is an electrical safety organization, and the different PCB grades primarily describe the flammability, high temperature stability, and moisture absorption of the board. Therefore, specifying a given NEMA grade does not guarantee electrical parameters of the material. If this becomes critical for an application, consult the manufacturer of the raw board stock.

Laminated materials are designated with FR (flame resistant) and G grades. FR–1 is the least flame resistant, and FR–5 is the most. G10 and G11 have special characteristics, as described in Table 23.1.

Do not use FR–1. There are many examples of boards with burned spots, where high wattage components heated a section of the board for a period of time. This grade of PCB material has more in common with cardboard than anything else.

FR–4 is commonly used in industrial quality equipment, while FR–2 is used in high volume consumer applications. These two board materials appear to be industry standards. Deviating from these standards can limit the number of raw board material suppliers and PCB houses that can fabricate the board because their tooling is already set up for these materials. Nevertheless, in some applications, one of the other grades may make sense. For very high frequency applications, it may be necessary to consider Teflon or even ceramic board substrate. One thing can be counted on, however: The more exotic the board substrate, the more expensive it is.

In selecting a board material, pay careful attention to the moisture absorption. Just about every desirable performance characteristic of the board is negatively affected by moisture. This includes surface resistance of the board, dielectric leakage, high voltage breakdown and arcing, and mechanical stability. Also, pay attention to the operating temperature. High operating temperatures can occur in unexpected places, such as in proximity to large digital ICs that switch at high speeds. Be aware that heat rises, so if one of those 500 pin monster ICs is located directly under a sensitive analog circuit, both the PCB and circuit characteristics may vary with the temperature.

After the board substrate material has been selected, the next decision is how thick to make the copper foil laminate. For most applications, 1 oz copper is sufficient. If the circuit consumes a lot of power, 2 oz may be better. Avoid ½ oz copper, because it tends to break between the trace and the pad.

Depending on the complexity of the overall circuitry being designed, a designer must decide how many layers to make the PCB.

There has been a lot of confusion in the past over the optimum order for PCB layers. Take, for example, a four layer board consisting of two signal layers, a power plane, and a ground plane. Is it better to route the signal traces between the layers, thus providing shielding for the signal traces, or to make the ground and power planes the two inner planes?

In considering this question, it is important to remember that, no matter what is decided, signals will still be exposed on one or both of the top and bottom planes. The leads of the op amp PCB package and the traces on the board leading to nearby passive components and feed throughs will be exposed. Therefore, all shielding effects are compromised. It is far better to take advantage of the distributed capacitance between the power and ground plane by making them internal.

Another advantage of placing the planes internally is that the signal traces are available for probing and modification on the top and bottom layers. Anyone who has had to change connections on buried traces appreciates this feature.

For more than four layers, it is a general rule to shield higher speed signals between the ground and power planes and route slower signals on the outer layers.

Separate grounding for analog and digital portions of circuitry is one of the simplest and most effective methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes. If the designer is not careful, the analog circuitry will be connected directly to these ground planes. The analog circuitry return, after all, is the same net in the netlist as digital return. Autorouters respond accordingly and connect all the grounds, creating a disaster.

After the fact separation of grounds on a mixed digital and analog board is almost impossible. Every ground connection in the analog circuitry must be lifted from the board and connected together. For surface mount boards, this results in a colossal mess of “tombstoned” passive components and floating IC leads.

Figure 23.5 shows a possible board layout. In this system, all electronics, including the power supply, reside on one PCB. Three isolated ground/power planes are employed: one for power, one for digital, and one for analog. Power and ground connections from digital and analog sections of the board are combined only in the supply section and are combined in close proximity. High frequency conducted noise on the power lines is limited by inductors (chokes). In this case, the designer has even located low frequency analog circuitry close to low speed digital, keeping high frequency digital and analog physically apart on the board. This is a good, careful design that has a high likelihood of success—providing good layout and decoupling rules are also followed.

In one case, it is necessary to combine analog and digital signals on the analog ground plane. Analog to digital and digital to analog converters (ADCs and DACs) are packaged as ICs with analog and digital ground pins coming out of the package. One might assume, based on the previous discussion, that the digital ground pin should be connected to digital ground and the analog ground pin to analog ground. That, however, is not correct.

The pin names analog ground and digital ground refer to internal connections in the IC, not the plane to which they should be connected. Both should connect to the analog ground plane. The connection would have been made inside the IC, but it is impossible to get low enough impedance at the typical geometries inside ICs. The IC designer actually counts on the end user to supply a low impedance connection outside the IC. Otherwise, the performance of the converter is worse than specified.

One might suspect that the digital portions of the converter would make circuit performance worse by coupling digital switching noise onto the analog ground and power plane. Converter designers realize this and design digital portions without a lot of output power to minimize switching transients. If the converter does not drive large fanouts, this should be no problem. Be sure to properly decouple the logic supply for the converter to analog ground (see the following section).

High frequency performance of resistors is approximated by the schematic shown in Figure 23.6.

Resistors are typically one of three types: wire wound, carbon composition, or film. It does not take a lot of imagination to understand how wire wound resistors can become inductive, because they are coils of resistive wire. Most designers are not aware of the internal construction of film resistors, which are also coils of thin metallic film. Therefore, film resistors are also inductive at high frequencies. The inductance of film resistors is lower, however, and values under 2 kΩ are usually suitable for high frequency work.

The end caps of resistors are parallel, and there will be an associated capacitance. Usually, the resistance will make the parasitic capacitor so “leaky” that the capacitance does not matter. For very high resistances, the capacitance appears in parallel with the resistance, lowering its impedance at high frequencies.

High frequency performance of capacitors is approximated by the schematic shown in Figure 23.7. Capacitors are used in analog circuitry for power supply decoupling and as filter components. For an ideal capacitor, reactance decreases by the formula where

Therefore, a 10 μF electrolytic capacitor has a reactance of 1.6 Ω at 10 kHz and 160 μΩ at 100 MHz. Right?

In reality, one never sees the 160 μΩ with the electrolytic capacitor. Film and electrolytic capacitors have layers of material wound around each other, which creates a parasitic inductance. The self-inductance effects of ceramic capacitors are much smaller, giving them a higher operating frequency. There is also some leakage current from plate to plate, which appears as a resistance in parallel with the capacitor, as well as resistance within the plates themselves, which add a parasitic series resistance. The electrolyte itself in electrolytic capacitors is not perfectly conductive (to reduce leakage current). These resistances combine to create the equivalent series resistance (ESR). The capacitors used for decoupling should be low ESR types, as any series resistance limits the effectiveness of the capacitor for ripple and noise rejection. Elevated temperatures also severely increase the ESR and can be permanently destructive to capacitors. Therefore, if an aluminum electrolytic will be subjected to high temperatures, use the high temperature grade (105°C) not the low temperature grade (85°C).

For leaded parts, the leads themselves also add a parasitic inductance. For small values of capacitance, it is important to keep the lead lengths short. The combination of parasitic inductance and capacitance can produce resonant circuits! Assuming a lead self-inductance of 8 nH/cm (see the following sections), a 0.01 μF capacitor with two 1 cm leads resonates at 12.5 MHz. This effect was well known to engineers many decades ago, who designed vacuum tube based products with leaded components. Woe be to any hobbyist restoring antique radios that is unaware of this effect!

If electrolytic capacitors are used in a design, make sure that the polarity is correctly observed. The positive terminal of the capacitor must be connected to the more positive of two DC potentials. If there is any doubt whatsoever which polarity is correct, design calculations must continue until it is known, or a prototype must be built. Incorrect polarity of electrolytic capacitors causes them to conduct DC current, in most cases, destroying the part—and probably the rest of the circuit as well. If there is a rare case in which both polarities are present, use a nonpolarized electrolytic capacitor (which is constructed by connecting two polarized electrolytic capacitors in series). Of course, one can always connect two capacitors in series on the PCB, keeping in mind that the effective capacitance is cut in half for equal values of capacitor.

High frequency performance of inductors is approximated by the schematic shown in Figure 23.8. Inductive reactance is described by the formula

where

Therefore, a 10 mH inductor has a reactance of 628 Ω at 10 kHz, which increases to 6.28 MΩ at 100 MHz. Right?

In reality, one never sees the 6.28 MΩ with this inductor. Parasitic resistances are easy to understand: The inductor is constructed of wire, which has a given resistance per unit length. Parasitic capacitance is harder to visualize, unless one considers that each turn of wire in the inductor is located next to adjacent turns, forming a capacitor. This parasitic capacitance limits the upper frequency of this inductor to under 1 MHz. Even small wire wound inductors start to become ineffective in the 10 MHz to 100 MHz range.

In addition to the obvious passive components just discussed, the PCB itself has characteristics that form components every bit as real as those discussed previously—just not as obvious.

If analog circuitry is located on the same board with digital circuitry, it is important to understand a little about the electrical characteristics of digital gates.

A typical digital output consists of two transistors connected in series between power and ground (Figure 23.15). One transistor is turned on and the other turned off to produce logic high and vice versa for logic low. Because one transistor is turned off for either logic state, the power consumption for either logic state is low, while the gate is static at that level.

The situation changes dramatically whenever the output switches from one logic state to the other. For a brief period of time, both transistors conduct simultaneously. During this period of time, current drawn from the power supply increases dramatically, since there is now a low impedance path through the two transistors from power to ground. Power consumption rises dramatically then falls, creating a droop on the power supply voltage and a corresponding current spike. The current spike radiates radio frequency (RF) energy. There may be dozens or even hundreds of such outputs on a digital IC, so the aggregate effect may be quite dramatic.

It is impossible to predict the frequencies of these spikes, because the frequencies are affected by the propagation delays of the transistors in the gate. Propagation delay is affected by random factors that occur during manufacture. Digital switching noise is broadband, with harmonics throughout the spectrum. A general rejection technique is required, rather than one that rejects a specific frequency.

Table 23.2 is a rough guideline describing the maximum useful frequencies of common capacitor types.

Obviously, from the table, tantalum electrolytic capacitors are useless for frequencies above 1 MHz. Effective high frequency decoupling at higher frequencies demands a ceramic capacitor. Self-resonances of the capacitor must be known and avoided, or the capacitor may not help or even make the problem worse. Figure 23.16 illustrates the typical self-resonance of two capacitors commonly used for bypassing: 10 μF tantalum electrolytic and 0.01 μF ceramic.

Consider these resonances to be typical values, the characteristics of actual capacitors can vary from manufacturer to manufacturer and grade of part to grade of part. The important thing is to make sure that the self-resonance of the capacitor occurs at a frequency above the range of the noise that must be rejected. Otherwise, the capacitor enters a region where it is inductive.

Do not assume that a single 0.1 μF capacitor will decouple all frequencies. Smaller capacitors may work better at higher frequencies than larger ones. When poor decoupling at higher frequencies is suspected, try a smaller capacitor rather than a larger one.

The method most often used to decouple the high frequency noise is to include a capacitor or multiple capacitors connected from the op amp power pin to the op amp ground pin. It is important to keep the traces on this decoupling capacitor short. If not, the traces on the PCB have significant self-inductance, defeating the purpose of the capacitor.

A decoupling capacitor must be included on every op amp package, whether it contains one, two, or four devices per package. The value of capacitor must be picked carefully to reject the type of noise present in the circuit.

In particularly troublesome cases, it may be necessary to add a series inductor into the power supply line connecting to the op amp. This inductor is in addition to the decoupling capacitors, which are the first line of defense. The inductor should be located before, not after, the capacitors.

Another technique that is lower in cost is to replace the series inductor with a small resistor in the 10 Ω to 100 Ω range. The resistor forms a low pass filter with the decoupling capacitors. There is a penalty to pay for this technique: Depending on the power consumption of the op amp, it will reduce the rail to rail voltage range. The resistor forms a voltage divider with the op amp as a resistive active component in the lower leg of the divider. Depending on the application, this may or may not be acceptable.

Usually, enough low frequency ripple is on the power supply at the board input to warrant a bulk decoupling capacitor at the power input. This capacitor is used primarily to reject low frequency signals, so an aluminum or tantalum capacitor is acceptable. An additional ceramic cap at the power input decouples any stray high frequency switching noise that may be coupled off of the other boards.

The older technology for op amps and other components is through hole. Components are constructed with leads that insert through holes in the board, hence the name.

Through hole components, due to their size, are better suited to applications where space is not an issue. The components themselves are frequently lower in cost but the PCB is more expensive, because the PCB fabrication house has to drill holes for component leads. PCBs are primarily a mechanical fabrication; the number of holes and number of different drills have a big impact on the price.

The leads on a through hole op amp are arranged on a 0.1 in. grid. Many PCB layout people like to maintain the 0.1 in. grid for the rest of the components as well. Resistors and other passive components can even be purchased with leads prebent to land on a 0.1 in. grid. Some electrolytic capacitors have leads that are on a 0.025 in. grid.

These component sizes may force a lot of wasted area on the PCB. Components that ideally should be placed close to the op amp itself may be forced several tenths of an inch away, due to intervening components. Therefore, through hole circuitry is not recommended for high speed analog circuitry or for analog circuitry in proximity to high speed digital.

Some designers attempt to overcome the long trace length caused by resistors by placing the resistors on the board vertically, one lead of the resistor bent close to the body of the part. This is common in older consumer electronics. This allows for denser placement of parts and may help some with trace length, but each resistor exposes almost 1 cm of one component lead to radiated signals and lead self-inductance.

An advantage of the through hole approach of PCB layout is that the through holes themselves can serve as feed throughs, reducing the number of vias in complex circuits.

Surface mount circuitry does not require a hole for each component lead. Automated testing, however, may require vias on every node. The holes were never an issue with through hole circuitry, because every component lead made a hole in the board. The PCB layout designer who is used to designing a board with a minimum number of vias now has to put a via on every node of the circuit. This can make Swiss cheese out of a nice continuous ground plane, negating many of the advantages it provides.

Fortunately, there is a close variation of the “via on every node” requirement. This requirement can often be met by putting a test pad on every node. The automated test station can then access the analog circuitry from the top of the board. A clamshell test fixture is significantly more expensive than one that accesses only one side of the board. The extra cost can be justified if there is documentation that circuit performance will be unacceptable with vias.

Signal connections to ground or the power supply may have to be made through a small fixed resistor instead, so the automated equipment can access that pin of the IC and test its function.

In many op amp designs, one or more op amps may be unused. If this is the case, the unused section must be terminated properly. Improper termination can result in greater power consumption, more heat, and more noise in op amps on the same physical IC. If the unused section of the op amp is connected as shown in the better side of Figure 23.21, it will be easier to use it for design changes.