13
THYRISTOR CONVERTERS

13.1 INTRODUCTION

Historically, thyristor converters were used to perform tasks that are now performed by switch-mode converters, discussed in previous chapters. Thyristor converters are now typically used in utility applications at very high power levels. In this chapter, we will examine the operating principles of thyristor-based converters.

13.2 THYRISTORS (SCRs)

A thyristor is a device that can be considered a controlled diode. Like diodes, they are available in very large voltage and current ratings, making them attractive for use in applications at very high power levels.

Thyristors, shown by their symbol in Figure 13.1a, are sometimes referred to by their trade name of silicon controlled rectifiers (SCRs). These are 4-layer (p-n-p-n) devices, as shown in Figure 13.1b. When a reverse (v Subscript upper A upper K Baseline less-than 0 ) voltage is applied, the flow of current is blocked by the junctions pn1 and pn3. When a forward (v Subscript upper A upper K Baseline ampersand gt semicolon 0 ) polarity voltage is applied, and the gate terminal is open, the flow of current is blocked by the junction pn2, and the thyristor is considered to be in a forward-blocking state. In this forward-blocking state, applying a small positive voltage to the gate with respect to the cathode for a short interval supplies a pulse of gate current i Subscript upper G that latches the thyristor in its on state, and subsequently, the gate-current pulse can be removed.

FIGURE 13.1 Thyristors.

13.2.1 Primitive Thyristor Rectifier Circuits

The behavior of thyristors is illustrated by means of a simple circuit with a resistive load in Figure 13.2a. At omega t equals 0 , the positive half-cycle of the input voltage begins, beyond which a forward voltage appears across the thyristor (anode A is positive with respect to cathode K), and if the thyristor were a diode, a current would begin to flow in this circuit. This instant we will refer to as the instant of natural conduction. With the thyristor in a forward-blocking state, the start of conduction can be controlled (delayed) with respect to the instant of natural conduction, which is omega t equals 0 in this circuit, by a delay angle alpha at which instant the gate-current pulse is applied. Once in the conducting state, the thyristor behaves like a diode with a very small voltage drop of the order of 1 to 2 volts across it (we will idealize it as zero), and the load voltage v Subscript d equals v Subscript s in Figure 13.2b, where v Subscript d is indicated by the darker waveform. The current equals v Subscript d Baseline slash upper R , as shown in Figure 13.2b.

FIGURE 13.2 A simple thyristor circuit with a resistive load.

The current declines to zero at omega t equals pi , and since it cannot reverse through the thyristor, it stays zero during the negative half-cycle of the voltage waveform, as shown in Figure 13.2b. The current through the thyristor stays zero until the gate pulse is applied in the next cycle of the voltage waveform. The average value upper V Subscript d of the load voltage is indicated by the dotted line in Figure 13.2b. This average value can be calculated analytically from the upper V Subscript d waveform in Figure 13.2b as

upper V Subscript d Baseline equals StartFraction 1 Over 2 pi EndFraction integral Overscript zero width space Endscripts Overscript zero width space Endscripts Subscript alpha Superscript pi Baseline ModifyingAbove upper V With caret Subscript s Baseline s i n omega t dot d left-parenthesis omega t right-parenthesis equals StartFraction ModifyingAbove upper V With caret Subscript s Baseline Over 2 pi EndFraction left-parenthesis 1 plus c o s alpha right-parenthesis comma (13.1)

where ModifyingAbove upper V With caret Subscript s is the peak of the input AC voltage. From Equation 13.1, it is clear that we can control the average load voltage by controlling the delay angle alpha ; this was not possible in the diode-rectifier circuits of Chapter 5.

To consider the influence of inductance in series, consider the primitive circuit of Figure 13.3a. The associated waveforms in Figure 13.3b show that due to the inductor, the current builds up slowly and comes to zero some time in the negative half-cycle of the input voltage. The current through the thyristor cannot reverse and remains zero for the remainder of the input voltage cycle. This principle can be extended to practical circuits discussed below.

FIGURE 13.3 Thyristor circuit with a resistive load and a series inductance.

13.3 SINGLE-PHASE, PHASE-CONTROLLED THYRISTOR CONVERTERS

Figure 13.4a shows a commonly used full-bridge phase-controlled converter for controlled rectification of the single-phase utility voltage. To understand the operating principle, it is redrawn in Figure 13.4b, where the AC-side inductance upper L Subscript s is ignored, and the DC-side load is represented as drawing a constant current upper I Subscript d . The waveforms are shown in Figure 13.5.

FIGURE 13.4 Full-bridge, single-phase thyristor converter

FIGURE 13.5 Single-phase thyristor converter waveforms.

Thyristors (1, 2) and (3, 4) are treated as two pairs, where each thyristor pair is supplied gate pulses delayed by an angle alpha with respect to the instant of natural conduction at omega t equals 0 degree for thyristors (1, 2) and at omega t equals 180 degree for 3 and 4, as shown in Figure 13.5.

In the positive half-cycle of the input voltage, thyristors 1 and 2 are forward-blocking until they are gated at omega t equals alpha when they immediately begin to conduct upper I Subscript d (because upper L Subscript s is assumed to be zero), and thyristors 3 and 4 become reverse-blocking. In this state,

StartLayout 1st Row 1st Column v Subscript d Baseline left-parenthesis t right-parenthesis equals v Subscript s Baseline left-parenthesis t right-parenthesis and i Subscript s Baseline left-parenthesis t right-parenthesis equals upper I Subscript d Baseline comma 2nd Column alpha less-than omega t less-than-or-equal-to alpha plus pi EndLayout period (13.2)

These relationships hold true until alpha plus pi in the negative half-cycle of the input voltage when thyristors 3 and 4 are gated and begin conducting upper I Subscript d . In this state,

StartLayout 1st Row 1st Column v Subscript d Baseline left-parenthesis t right-parenthesis equals minus v Subscript s Baseline left-parenthesis t right-parenthesis 2nd Column and 3rd Column i Subscript s Baseline left-parenthesis t right-parenthesis equals minus upper I Subscript d Baseline 4th Column alpha plus pi less-than omega t less-than-or-equal-to alpha plus 2 pi EndLayout comma (13.3)

which holds true for one half-cycle until the next half-cycle begins with the gating of thyristors 1 and 2.

The average value upper V Subscript d of the voltage across the DC side of the converter can be obtained by averaging the v Subscript d Baseline left-parenthesis t right-parenthesis waveform in Figure 13.5 over only one half-cycle (by symmetry) during alpha less-than omega t less-than-or-equal-to alpha plus pi :

upper V Subscript d Baseline equals StartFraction 1 Over pi EndFraction integral Overscript zero width space Endscripts Overscript zero width space Endscripts Superscript zero width space Baseline Underscript alpha Overscript alpha plus pi Endscripts ModifyingAbove upper V With caret Subscript s Baseline sine omega t dot d left-parenthesis omega t right-parenthesis equals StartFraction 2 Over pi EndFraction ModifyingAbove upper V With caret Subscript s Baseline cosine alpha period (13.4)

On the AC side, the input current i Subscript s waveform is shifted by an angle alpha with respect to the input voltage, as shown in Figure 13.5, and the fundamental-frequency component i Subscript s Baseline 1 Baseline left-parenthesis t right-parenthesis has a peak value of

ModifyingAbove upper I With caret Subscript s Baseline 1 Baseline equals StartFraction 4 Over pi EndFraction upper I Subscript d Baseline period (13.5)

In terms of voltage and current peak values, the power drawn from the AC side is

upper P equals one-half ModifyingAbove upper V With caret Subscript s Baseline ModifyingAbove upper I With caret Subscript s Baseline 1 Baseline c o s alpha period (13.6)

Assuming no power loss in the thyristor converter, the input power equals the power to the DC side of the converter. Using Equations 13.4 and 13.5, we can reconfirm the following relationship:

upper P equals one-half ModifyingAbove upper V With caret Subscript s Baseline ModifyingAbove upper I With caret Subscript s Baseline 1 Baseline c o s alpha equals upper V Subscript d Baseline upper I Subscript d Baseline period (13.7)

In this converter, the current is unidirectional, but the DC-side voltage can be controlled and can be of either polarity. Therefore, the power flow can be controlled by the delay angle alpha ; increasing it toward 90 degree reduces the average DC-side voltage upper V Subscript d while simultaneously shifting the input current i Subscript s Baseline left-parenthesis t right-parenthesis waveform farther away with respect to the input voltage waveform. The DC voltage as a function of alpha is plotted in Figure 13.6a, and the corresponding power direction is shown in Figure 13.6b. The waveforms in Figure 13.5 show that for the delay angle alpha in a range from 0 degree to 90 degree , upper V Subscript d has a positive value, as also plotted in Figures 13.6a and 13.6b, and the converter operates as a rectifier, with power flowing from the AC side to the DC side.

FIGURE 13.6 Effect of the delay angle alpha.

Delaying the gating pulse such that alpha is greater than 90 degree in Figure 13.5 makes upper V Subscript d negative (also confirmed by Equation 13.4), and the converter operates as an inverter, as illustrated in Example 13.1.

Example 13.1

Draw the waveforms for the full-bridge thyristor converter of Figure 13.4b if it’s operating in an inverter mode with the delay angle alpha equal to 150 degree .

Solution Since alpha now equals 150 degree , in comparison to Figure 13.5, the i Subscript s waveform is shifted by 150 degree with respect to v Subscript s waveform as shown in Figure 13.7.

FIGURE 13.7 Single-phase thyristor converter in an inverter mode with alpha equals 150 degree.

In the inverter mode, as shown in Figure 13.6b, power flows from the DC side to the AC side. In practical circuits with inductance in series on the AC side, the upper limit on alpha in the inverter mode is less than 180 degree , for example, 160 degree , as shown in Figure 13.6a, to avoid a phenomenon known as the commutation failure, where the current fails to commutate fully from the conducting thyristor pair to the next pair, prior to the instant beyond which the conducting pair keeps on conducting for another half-cycle. This commutation-failure phenomenon is described in greater detail in [1].

13.3.1 Current Harmonics and Reactive Power Requirement

As can be seen from the AC-side current waveform i Subscript s in Figure 13.5, the current is rectangular, and the fundamental-frequency waveform is drawn dotted, whose amplitude ModifyingAbove upper I With caret Subscript s Baseline 1 is given in Equation 13.5. From Fourier analysis, the harmonics h of i Subscript s can be expressed in terms of the fundamental frequency component as

StartLayout 1st Row 1st Column ModifyingAbove upper I With caret Subscript s h Baseline equals StartFraction ModifyingAbove upper I With caret Subscript s Baseline 1 Baseline Over h EndFraction 2nd Column left-parenthesis where h takes on odd values 3 comma 5 comma 7 comma etc period right-parenthesis EndLayout (13.8)

As can be observed from Figure 13.5, i Subscript s Baseline 1 is displaced with respect to v Subscript s by the delay angle alpha . Therefore, the reactive power drawn by the converter is

upper Q equals one-half ModifyingAbove upper V With caret Subscript s Baseline ModifyingAbove upper I With caret s Baseline 1 sine alpha period (13.9)

13.3.2 Effect of upper L Subscript s on Current Commutation

Previously, our assumption was that the AC-side inductance upper L Subscript s equals zero. Now consider the circuit in Figure 13.8a. In this case, the input current takes a finite amount of time to reverse its direction through the AC-side inductance as the current “commutates” from one thyristor pair to the next.

FIGURE 13.8 Effect of upper L Subscript s on current commutation.

From basic principles, we know that changing the current through the inductor upper L Subscript s in the circuit of Figure 13.8a requires a finite amount of volt-seconds. The DC side is still represented by a DC current upper I Subscript d . The waveforms are shown in Figure 13.8b, where thyristors 3 and 4 are conducting prior to omega t equals alpha , and i Subscript s Baseline equals minus upper I Subscript d .

At omega t equals alpha , thyristors 1 and 2, which have been forward blocking, are gated, and hence they immediately begin to conduct. However, the current through them doesn’t jump instantaneously as in the case of upper L Subscript s Baseline equals 0 where i Subscript s instantaneously changed from left-parenthesis minus upper I Subscript d Baseline right-parenthesis to left-parenthesis plus upper I Subscript d Baseline right-parenthesis . With a finite upper L Subscript s , during a short interval called the commutation interval u, all thyristors conduct, thus resulting in v Subscript d Baseline equals 0 and applying v Subscript s across upper L Subscript s . To correspond to Figure 13.8b, where waveforms are plotted with respect to omega t , we will calculate the commutation voltage integral in volt-radians rather than in volt-seconds. The volt-radians needed to change the inductor current from left-parenthesis minus upper I Subscript d Baseline right-parenthesis to left-parenthesis plus upper I Subscript d Baseline right-parenthesis can be calculated by integrating the inductor voltage v Subscript upper L Baseline left-parenthesis equals upper L Subscript s Baseline dot d i Subscript s Baseline slash d t right-parenthesis v Subscript upper L Baseline left-parenthesis equals upper L Subscript s Baseline dot d i Subscript s Baseline slash d t right-parenthesis from alpha to left-parenthesis alpha plus u right-parenthesis , as follows:

integral Subscript alpha Superscript alpha plus u Baseline zero width space v Subscript upper L Baseline d left-parenthesis omega t right-parenthesis equals upper L Subscript s Baseline integral Subscript alpha Superscript alpha plus u Baseline zero width space StartFraction d i Subscript s Baseline Over d t EndFraction d left-parenthesis omega t right-parenthesis equals omega upper L Subscript s Baseline integral Subscript minus upper I Subscript d Baseline Superscript upper I Subscript d Baseline Baseline zero width space StartFraction d i Subscript s Baseline Over CrossOut d t EndCrossOut EndFraction CrossOut d t EndCrossOut equals omega upper L Subscript s Baseline integral Subscript minus upper I Subscript d Baseline Superscript upper I Subscript d Baseline Baseline zero width space d i Subscript s Baseline equals 2 omega upper L Subscript s Baseline upper I Subscript d Baseline period (13.10)

The above volt-radians are “lost” from the integral of the DC-side voltage waveform in Figure 13.8b every half-cycle, as shown by the shaded area upper A Subscript u in Figure 13.8b. Therefore, dividing the volt-radians in Equation 13.10 by the pi radians each half-cycle, the voltage drop in the DC-side voltage is

upper Delta upper V Subscript d Baseline equals StartFraction 2 Over pi EndFraction omega upper L Subscript s Baseline upper I Subscript d Baseline period (13.11)

This voltage is lost from the DC-side average voltage in the presence of upper L Subscript s . Therefore, the average voltage is smaller than that in Equation 13.4:

upper V Subscript d Baseline equals StartFraction 2 Over pi EndFraction ModifyingAbove upper V With caret Subscript s Baseline cosine alpha minus StartFraction 2 Over pi EndFraction omega upper L Subscript s Baseline upper I Subscript d Baseline period (13.12)

We should note that the voltage drop in the presence of upper L Subscript s doesn’t mean a power loss in upper L Subscript s ; it simply means a reduction in the voltage available on the DC side.

Example 13.2

In a single-phase thyristor converter of Figure 13.8a including upper L Subscript s , derive the expression for the commutation angle u , and (b) calculate it if upper V Subscript s Baseline left-parenthesis rms right-parenthesis equals 120 normal upper V , upper L Subscript s Baseline equals 5 m upper H , upper I Subscript d Baseline equals 10 normal upper A , and alpha equals 30 degree . Frequency f equals 60 Hz .

Solution

  • From Figure 13.8a, in Equation 13.10 during the commutation interval, v Subscript upper L Baseline equals v Subscript s . Therefore, substituting v Subscript s for v Subscript upper L in Equation 13.10,
    integral Subscript alpha Superscript alpha plus u Baseline ModifyingAbove upper V With caret Subscript s Baseline sine omega t dot d left-parenthesis omega t right-parenthesis equals ModifyingAbove upper V With caret Subscript s Baseline left-bracket cosine alpha minus cosine left-parenthesis alpha plus u right-parenthesis right-bracket equals 2 omega upper L Subscript s Baseline upper I Subscript d Baseline comma

    or

    cosine left-parenthesis alpha plus u right-parenthesis equals cosine alpha minus StartFraction 2 omega upper L Subscript s Baseline upper I Subscript d Baseline Over ModifyingAbove upper V With caret Subscript zero width space s Baseline EndFraction period (13.13)
  • Substituting the given values in Equation 13.13, where ModifyingAbove upper V With caret Subscript zero width space s Baseline equals StartRoot 2 EndRoot upper V Subscript s Baseline left-parenthesis r m s right-parenthesis , the commutation angle u equals 19.92 degree .

Assuming a linear increase/decrease in thyristor currents in Figure 13.8, the fundamental frequency component i Subscript s Baseline 1 shown dotted in Figure 13.8b lags the voltage v Subscript s by an angle phi 1 :

phi 1 asymptotically-equals alpha plus StartFraction u Over 2 EndFraction comma (13.14)

where the approximately-equal sign is due to the assumption of linear increase/decrease in thyristor currents. Therefore, the reactive power drawn by the converter is

upper Q asymptotically-equals one-half ModifyingAbove upper V With caret Subscript s Baseline ModifyingAbove upper I With caret Subscript s Baseline 1 Baseline sine left-parenthesis alpha plus StartFraction u Over 2 EndFraction right-parenthesis period (13.15)

13.4 THREE-PHASE, FULL-BRIDGE THYRISTOR CONVERTERS

Three-phase full-bridge converters use six thyristors, as shown in Figure 13.9a. A simplified converter for initial analysis is shown in Figure 13.9b, where the AC-side inductance upper L Subscript s is assumed zero, thyristors are divided into a top group and a bottom group, similar to the three-phase diode rectifiers, and the DC side is represented by a current source upper I Subscript d .

FIGURE 13.9 Three-phase full-bridge thyristor converter.

The converter waveforms, where the delay angle alpha (measured with respect to the instant at which phase voltage waveforms cross each other) is zero, are similar to those in diode rectifiers, discussed in Chapter 5 (see Figures 5.11 and 5.12). The average DC voltage is as calculated in Equation 5.33, where ModifyingAbove upper V With caret Subscript upper L upper L is the peak value of the AC input voltage:

upper V Subscript d o Baseline equals StartFraction 1 Over pi slash 3 EndFraction integral Subscript negative pi slash 6 Superscript pi slash 6 Baseline ModifyingAbove upper V With caret Subscript upper L upper L Baseline cosine omega t dot d left-parenthesis omega t right-parenthesis equals StartFraction 3 Over pi EndFraction ModifyingAbove upper V With caret Subscript upper L upper L Baseline period (13.16)

Delaying the gate pulses to the thyristors by an angle alpha measured with respect to their instants of natural conductions, the waveforms are shown in Figure 13.10 where upper L Subscript s Baseline equals 0 .

FIGURE 13.10 Waveforms with upper L Subscript s Baseline equals 0.

In the DC-side output voltage waveforms, the area upper A Subscript alpha corresponds to “volt-radians loss” due to delaying the gate pulses by alpha every pi slash 3 radian. Assuming the time-origin as shown in Figure 13.10 at the instant at which v Subscript a n and v Subscript c n waveforms cross, the line-line voltage v Subscript a c waveform can be expressed as ModifyingAbove upper V With caret Subscript upper L upper L Baseline sine omega t . Therefore from Figure 13.10, the drop upper Delta upper V Subscript alpha in the average DC-side voltage can be calculated as

upper Delta upper V Subscript alpha Baseline equals StartFraction 1 Over pi slash 3 EndFraction ModifyingBelow integral Subscript 0 Superscript alpha Baseline ModifyingAbove upper V With caret Subscript upper L upper L Baseline sine omega t dot d left-parenthesis omega t right-parenthesis With presentation form for vertical right-brace Underscript upper A Subscript alpha Baseline Endscripts equals StartFraction 3 Over pi EndFraction ModifyingAbove upper V With caret Subscript upper L upper L Baseline left-parenthesis 1 minus cosine alpha right-parenthesis period (13.17a)

Using Equations 13.16 and 13.17a, with a finite delay angle alpha , the DC-side voltage is

upper V Subscript d alpha Baseline equals StartFraction 3 Over pi EndFraction ModifyingAbove upper V With caret Subscript upper L upper L Baseline cosine alpha equals upper V Subscript d o Baseline cosine alpha period (13.17b)

The phase currents in Figure 13.9a can be expressed as

i Subscript a Baseline equals i 1 minus i 4 i Subscript b Baseline equals i 3 minus i 6 i Subscript c Baseline equals i 5 minus i 2 comma (13.18)

where i 1 , i 2 , and so on, are the currents in the forward direction through the thyristors. Currents through all three phases are shown in Figure 13.10. These waveforms show that each thyristor conducts for 120 degree during a fundamental-frequency cycle, and the effect of the delay angle alpha is to shift current waveforms by this angle to the right, causing them to lag their input voltages by this angle.

Similar to single-phase converters, three-phase thyristor converters go into the inverter mode with the delay angle alpha exceeding 90 degree . In the inverter mode, the upper limit on alpha is less than 180 degree to avoid commutation failure, just like in single-phase converters. Further details on three-phase thyristor converters can be found in [1].

Example 13.3

Three-phase thyristor converter of Figure 13.9b is operating in its inverter mode with alpha equals 150 degree . Draw waveforms similar to Figure 13.10 for this operating condition.

Solution These waveforms for alpha equals 150 degree in the inverter mode are shown in Figure 13.11.

FIGURE 13.11 Waveforms in the inverter mode.

13.4.1⋓Current Harmonics and Reactive Power Requirement

As can be seen from the AC-side current i Subscript a , for example, in Figure 13.10, the current has a rectangular waveform, and the fundamental-frequency component, from Fourier analysis, has an amplitude ModifyingAbove upper I With caret Subscript a Baseline 1 :

ModifyingAbove upper I With caret Subscript a Baseline 1 Baseline equals StartFraction StartRoot 12 EndRoot Over pi EndFraction upper I Subscript d Baseline period (13.19)

The harmonics h of i Subscript a can be expressed in terms of the fundamental frequency component as

StartLayout 1st Row 1st Column ModifyingAbove upper I With caret Subscript a h Baseline equals StartFraction ModifyingAbove upper I With caret Subscript a Baseline 1 Baseline Over h EndFraction 2nd Column left-parenthesis w h e r e h equals 6 n plus-or-minus 1 a n d n equals 1 comma 2 comma 3 EndLayout comma left-parenthesis e t c right-parenthesis right-parenthesis period (13.20)

In Figure 13.10, i Subscript a Baseline 1 is displaced with respect to v Subscript a n by the delay angle alpha . Therefore, the reactive power drawn by the three-phase converter is

upper Q equals three-halves ModifyingAbove upper V With caret Subscript a Baseline ModifyingAbove upper I With caret Subscript a Baseline 1 Baseline sine alpha period (13.21)

13.4.2 Effect ofupper L Subscript s

Unlike in the previous section, due to the presence of upper L Subscript s , it takes a finite commutation interval u for the current to commutate from one thyristor to the next, for example from thyristor 5 connected to phase c to the thyristor 1 connected to phase a. The sub-circuit under discussion during the commutation interval is shown in Figure 13.12a.

FIGURE 13.12 Commutation of current from thyristor 5 to thyristor 1.

During the commutation interval u , from alpha to alpha plus u , both thyristors are conducting as the current upper I Subscript d tries to commutate from 5 to 1, and as derived in Example 13.4, the voltage v Subscript upper P n is the average of the two-phase voltages:

StartLayout 1st Row 1st Column v Subscript upper P n Baseline equals StartFraction v Subscript a n Baseline plus v Subscript c n Baseline Over 2 EndFraction comma 2nd Column alpha less-than omega t less-than alpha plus u EndLayout comma (13.22)

which is shown in Figure 13.12b. As a consequence, the resulting voltage waveforms are shown in Figure 13.13, where such a commutation takes place every 60 degree . Considering Figure 13.12a during the commutation interval, v Subscript upper P n is reduced due to the voltage drop across the inductance in series with thyristor 1 to which the current is commutating from 0 to left-parenthesis plus upper I Subscript d Baseline right-parenthesis . Using the procedure in Equation 13.10 for single-phase converters, the area upper A Subscript u (in volt-radians) in Figure 13.13 can be calculated as

upper A Subscript u Baseline equals integral Subscript alpha Superscript alpha plus u Baseline v Subscript upper L Baseline d left-parenthesis omega t right-parenthesis equals omega upper L Subscript s Baseline integral d i Subscript s Baseline equals omega upper L Subscript s Baseline upper I Subscript d Baseline period Underscript 0 Overscript upper I Subscript d Endscripts (13.23)

FIGURE 13.13 Waveforms with upper L Subscript s.

Since such a commutation takes place every pi slash 3 radians, the average DC output voltage is reduced by the area upper A Subscript u divided by pi slash 3 radians. Making use of Equation 13.23, the drop in the average DC-side voltage is

upper Delta upper V Subscript u Baseline equals StartFraction upper A Subscript u Baseline Over pi slash 3 EndFraction equals StartFraction 3 Over pi EndFraction omega upper L Subscript s Baseline upper I Subscript d Baseline period (13.24)

Therefore, the DC-side output voltage can be written as

upper V Subscript d Baseline equals upper V Subscript d o Baseline minus upper Delta upper V Subscript alpha Baseline minus upper Delta upper V Subscript u Baseline period (13.25)

Substituting results from Equations 13.16, 13.17, and 13.24 into Equation 13.25,

upper V Subscript d Baseline equals StartFraction 3 Over pi EndFraction ModifyingAbove upper V With caret Subscript upper L upper L Baseline cosine alpha minus StartFraction 3 Over pi EndFraction omega upper L Subscript s Baseline upper I Subscript d Baseline period (13.26)

Example 13.4

In a three-phase thyristor converter of Figure 13.9a including upper L Subscript s , (a) derive the expression for the commutation angle u , and (b) calculate it if upper V Subscript upper L upper L Baseline left-parenthesis r m s right-parenthesis equals 460 normal upper V , upper L Subscript s Baseline equals 5 m upper H , upper I Subscript d Baseline equals 20 normal upper A , and alpha equals 30 degree .

Solution a. In the sub-circuit of Figure 13.12a when both thyristors are conducting, applying Kirchhoff’s current law at point upper P ,

i Subscript a Baseline plus i Subscript c Baseline equals upper I Subscript d Baseline period (13.27)

Assuming upper I Subscript d to be constant, taking the time derivatives of both sides of Equation 13.20 results in

StartFraction d i Subscript a Baseline Over d t EndFraction plus StartFraction d i Subscript c Baseline Over d t EndFraction equals 0 comma (13.28)

or

StartFraction d i Subscript a Baseline Over d t EndFraction equals minus StartFraction d i Subscript c Baseline Over d t EndFraction period (13.29)

Therefore, in Figure 13.12a,

v Subscript upper P n Baseline equals v Subscript a n Baseline minus upper L Subscript s Baseline StartFraction d i Subscript a Baseline Over d t EndFraction period (13.30)

Also,

v Subscript upper P n Baseline equals v Subscript c n Baseline minus upper L Subscript s Baseline StartFraction d i Subscript c Baseline Over d t EndFraction period (13.31)

Adding Equations 13.30 and 13.31 and making use of Equation 13.29,

StartLayout 1st Row 1st Column v Subscript upper P n Baseline equals StartFraction v Subscript a n Baseline plus v Subscript c n Baseline Over 2 EndFraction comma 2nd Column alpha less-than omega t less-than alpha plus u EndLayout period (13.32)

Substituting the expression for v Subscript upper P n from Equation 13.32 into Equation 13.30,

v Subscript upper L Baseline equals upper L Subscript s Baseline StartFraction d i Subscript a Baseline Over d t EndFraction equals v Subscript a n Baseline minus v Subscript upper P n Baseline equals one-half left-parenthesis v Subscript a n Baseline minus v Subscript c n Baseline right-parenthesis period (13.33)

In Equation 13.33, left-parenthesis v Subscript a n Baseline minus v Subscript c n Baseline right-parenthesis is the line-line voltage, and assuming the time-origin in Figure 13.13 at the intersection of the phase-a and phase-c voltages, the voltage drop v Subscript upper L in Equation 13.33 can be written as

v Subscript upper L Baseline equals upper L Subscript s Baseline StartFraction d i Subscript a Baseline Over d t EndFraction equals one-half ModifyingAbove upper V With caret Subscript upper L upper L Baseline sine omega t comma alpha less-than omega t less-than alpha plus u period (13.34)

Using Equation 13.34 into Equation 13.23,

upper A Subscript u Baseline equals integral Subscript alpha Superscript alpha plus u Baseline one-half ModifyingAbove upper V With caret Subscript upper L upper L Baseline sine omega t d left-parenthesis omega t right-parenthesis equals omega upper L Subscript s Baseline upper I Subscript d Baseline comma (13.35)

and therefore,

cosine left-parenthesis alpha plus u right-parenthesis equals cosine alpha minus StartFraction 2 omega upper L Subscript s Baseline upper I Subscript d Baseline Over ModifyingAbove upper V With caret Subscript upper L upper L Baseline EndFraction comma (13.36)

from which the commutation interval u can be calculated.

b. Substituting the given values in Equation 13.36, the commutation interval u is 11.4 degree .

Similar to single-phase converters, assuming a linear increase/decrease in thyristor currents in Figure 13.12b, the fundamental frequency component i Subscript a Baseline 1 in Figure 13.13 lags the voltage v Subscript s by

phi 1 asymptotically-equals alpha plus StartFraction u Over 2 EndFraction comma (13.37)

where the approximately-equal sign is due to assuming a linear increase/decrease in thyristor currents.

13.5 CURRENT-LINK SYSTEMS

Thyristors are available in very large current and voltage ratings of several kilo-amperes and several kilovolts that can be connected in series. In addition, thyristor converters can block voltages of both polarities but conduct current only in the forward direction. This capability has led to the interface realized by thyristor-converters with a DC-current link in the middle, as shown in Figure 13.14.

FIGURE 13.14 Block diagram of current-link systems.

Unlike in voltage-link systems, the transfer of power in current-link systems can be reversed in direction by reversing the voltage polarity of the DC link. This structure is used at very high power levels, in excess of a thousand megawatts, for example, in high-voltage DC (HVDC) transmission systems.

Thyristors in these two converters shown in Figure 13.14 are connected to allow the flow of current in the DC link by thyristors in converter 1 pointing up, and the thyristors in converter 2 connected to point downward. In Figure 13.14, subscripts 1 and 2 refer to systems 1 and 2 and upper R Subscript d is the resistance of the DC link that includes the DC transmission line. Assuming each converter is a six-pulse thyristor converter, as discussed previously,

upper V Subscript d Baseline 1 Baseline equals StartFraction 3 Over pi EndFraction ModifyingAbove upper V With caret Subscript upper L upper L Baseline 1 Baseline cosine alpha 1 minus StartFraction 3 Over pi EndFraction omega upper L Subscript s Baseline 1 Baseline upper I Subscript d Baseline comma (13.38)
upper V Subscript d Baseline 2 Baseline equals StartFraction 3 Over pi EndFraction ModifyingAbove upper V With caret Subscript upper L upper L Baseline 2 Baseline cosine alpha 2 minus StartFraction 3 Over pi EndFraction omega upper L Subscript s Baseline 2 Baseline upper I Subscript d Baseline period (13.39)

By controlling the delay angles alpha 1 and alpha 2 in a range of 0 Superscript ring to 180 Superscript ring (practically, this value is limited to approximately 160 Superscript ring ), the average voltage and the average current in the system of Figure 13.14 can be controlled, where current flow through the DC link can be expressed as

upper I Subscript d Baseline equals StartFraction upper V Subscript d Baseline 1 Baseline plus upper V Subscript d Baseline 2 Baseline Over upper R Subscript d Baseline EndFraction period (13.40)

Since the DC-link resistance upper R Subscript d is generally very small, upper V Subscript d Baseline 1 and upper V Subscript d Baseline 2 are very close in magnitude and opposite in value. For example, for the power flow from system 1 to system 2, upper V Subscript d Baseline 2 is made negative by controlling alpha 2 such that converter 2 operates as an inverter and establishes the voltage of the DC link. Converter 1 is operated as a rectifier, with a positive value of upper V Subscript d Baseline 1 , at a delay angle alpha 1 such that it controls the current in the DC link. The converse is true for these two converters if the power is to flow from system 2 to system 1.

The above discussion of current-link systems shows the operating principle behind HVDC transmission systems discussed in the next chapter, where using transformers, six-pulse thyristor converters are connected in series on the DC side and in parallel on the AC side to yield a higher effective pulse number.

REFERENCE

  1. 1. N. Mohan, T.M. Undeland, and W.P. Robbins, Power Electronics: Converters, Applications and Design, 3rd Edition (New York: John Wiley & Sons, 2003).

PROBLEMS

Single-Phase Thyristor Converters

In a single-phase thyristor converter, upper V Subscript s Baseline equals 120 normal upper V left-parenthesis r m s right-parenthesis at 60 Hz , and upper L Subscript s Baseline equals 3 mH . The delay angle alpha equals 45 degree . This converter is supplying 1 kW of power. The DC-side current i Subscript d can be assumed purely DC.

  1. 13.1 Calculate the commutation angle u .
  2. 13.2 Draw the waveforms for the converter variables v Subscript s , i Subscript s and v Subscript d .
  3. 13.3 Assuming that the currents through the thyristors increase/decrease linearly during commutations, calculate the reactive power drawn by the converter.

Three-Phase Thyristor Converters

In a three-phase thyristor converter, upper V Subscript upper L upper L Baseline equals 460 normal upper V left-parenthesis r m s right-parenthesis at 60 Hz , and upper L Subscript s Baseline equals 5 mH . The delay angle alpha equals 45 degree . This converter is supplying 5 kW of power. The DC-side current i Subscript d can be assumed purely DC.

  1. 13.4 Calculate the commutation angle u .
  2. 13.4 Draw the waveforms for the converter variables: phase voltages, phase currents, v Subscript upper P n , v Subscript upper N n and v Subscript d .
  3. 13.6 Assuming that the currents through the thyristors increase/decrease linearly during commutations, calculate the reactive power drawn by the converter.
  4. 13.7 In a three-phase thyristor converter, assume the commutation angle to be zero. Also, assume a given AC-side voltage upper V Subscript upper L upper L Baseline left-parenthesis r m s right-parenthesis and that the DC-side current upper I Subscript d is kept constant in magnitude. Plot the reactive power upper Q drawn by the converter in terms of upper I Subscript d , upper V Subscript upper L upper L Baseline left-parenthesis r m s right-parenthesis , as a function of the delay angle alpha . Explain why it is desirable to operate the converter close to alpha equals 0 in the rectifier mode and close to alpha equals 180 degree in the inverter mode.

Current-Link System

  1. 13.8 In the block diagram of Figure 13.14, for both three-phase converters, upper V Subscript d Baseline 0 Baseline equals 480 kV . The DC-side current is upper I Subscript d Baseline equals 1.1 kA . Converter 2 operating as an inverter establishes the DC-link voltage such that upper V Subscript d Baseline 2 Baseline equals negative 425 kV . upper R Subscript d Baseline equals 10.0 upper Omega . The drop in DC voltage due to commutation overlap in each converter is 10 kV. In DC steady state, calculate the following angles: alpha 1 , alpha 2 , u 1 and u 2 .
  2. 13.9 In Problem 13.8, calculate the reactive power drawn by each converter. Assume that the currents through the thyristors increase/decrease linearly during commutations.

Simulation Problems

  1. In a single-phase thyristor converter, the input voltage is upper V Subscript s Baseline equals 120 normal upper V left-parenthesis r m s right-parenthesis at 60 Hz frequency. The AC-side inductance is 1.2 mH, and on the DC side the load has an inductance of 20 mH in series with a resistance of 5 Ω.
  • Obtain the v Subscript s Baseline comma v Subscript d Baseline and i Subscript d Baseline waveforms.
  • Obtain the v Subscript s Baseline and i Subscript s Baseline waveforms.
  • From the plots, obtain the commutation interval u .
  • By means of Fourier analysis of i Subscript s , calculate its harmonic components as a ratio of upper I Subscript s Baseline 1 .
  • Calculate upper I Subscript s , %THD in the input current, the input displacement power factor, and the input power factor.
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