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DC–DC converters

Akram Ahamd Abu-aisheh^*

Majd Ghazi Batarseh^**
^* Department of Electrical and Computer Engineering, University of Hartford, West Hartford, CT, USA
^** Department of Electrical Engineering, Princess Sumaya University for Technology, Amman, Jordan

Abstract

Nonisolated switch-mode DC–DC converters are used in the design of different renewable energy systems. In photovoltaic solar energy systems, these converters are used to regulate and control the amplitude of the solar panel output voltage. There are three basic nonisolated switch-mode DC–DC converter topologies: step down (buck), step up (boost), and step up or down (buck–boost). For each of these converter topologies, the converter design and continuous conduction mode analysis are presented here. In switch-mode DC–DC converters, the amplitude of output voltage is controlled by controlling the duty ratio of the pulse at the input of the converter switch, and turning the converter switch on and off every cycle stores and then releases energy in the converter inductor. This chapter also covers the single ended primary inductance converter (SEPIC). SEPIC is a step-up or step-down switch-mode DC–DC converter that has low harmonic content and low component stress.

Keywords

DC–DC converter

switch mode

duty ratio

buck

boost

SEPIC

PWM

CCM

15.1. Introduction

The demands for clean and sustainable energy sources have increased rapidly in the last decade, and solar energy is currently one of the most valuable, abundant, and preferred low-maintenance clean sustainable energy sources. Photovoltaic (PV) solar energy systems require the use of DC–DC converters to regulate and control the varying output of the solar panel. The three basic DC–DC converter topologies used in PV solar energy systems are buck, boost, and buck–boost converter topologies. The three basic nonisolated switch-mode DC–DC converters are also used in many industrial applications to regulate and control the amplitude of an unregulated voltage.

The single-ended primary inductance converter (SEPIC) topology is a step-up or step-down topology with no voltage polarity reversal. The isolated topology of SEPIC converters is being used more often in photovoltaic solar energy systems. A SEPIC uses two inductors and two capacitors, so it is not a basic DC–DC converter topology since basic topologies use only one inductor, one diode, one switch, and one capacitor. The two inductors in the isolated SEPIC topology can be selected to have the same value and are wound on one core making forming a low cost 1:1 transformer with a small footprint. This makes SEPIC a more viable DC–DC converter choice.

This chapter focuses on the three basic nonisolated switch-mode DC–DC converters and SEPIC. Section 15.1 presents an introduction to nonisolated switch-mode DC–DC converters while Section 15.2 presents the three basic nonisolated switch-mode DC–DC converter structures. In Section 15.3, two application problem-based learning (PBL) projects are presented to induce in the reader the motivation to study DC–DC converters. After covering the three basic nonisolated switch-mode DC–DC converter topologies in Sections 15.4, 15.5, and 15.6, the SEPIC topology is covered in Section 15.7.

15.2. Basic nonisolated switch-mode DC–DC converters

There are three basic nonisolated switch-mode DC–DC converters: buck, boost, and buck–boost converters. Each of these basic converters consists of a MOSFET, a diode, a capacitor, and an inductor connected between the input voltage and the load in different configurations (topologies) to regulate and step down, step up, or step up or down the input voltage. Each of the three basic nonisolated switch-mode DC–DC converter topologies consists of a switching network consisting of a transistor–diode combination and an L–C filter bank consisting of only one inductor and one capacitor; hence, basic topology. Basic topologies employ only one transistor, typically a MOSFET, as the main switch and a diode. Synchronous topologies, on the other hand, employ two switches where the second switch replaces the diode. The ratio between the time the MOSFET is ON and one switching period is the duty cycle. The duty cycle is controlled using pulse width modulation to control the converter output voltage.

When selecting a DC–DC converter for any application, the designer should try first to choose the buck converter if a voltage step down is needed. The boost converter should be considered as the first choice if a voltage step up is needed for the design. If there is a need for step up or step down in the same converter, the first choice should be the buck–boost converter. If the design requirements cannot be met using any of the basic nonisolated switch-mode converters, SEPIC topology should be the next option to be considered. If higher efficiency is required, synchronous converters, with the diode replaced by a second switch to reduce converter losses, should be considered. For systems with higher isolation design requirements, isolated DC–DC converters should be considered. The preferred isolated switch-mode DC–DC converter topology is the flyback topology, which is a step-up or step-down topology with a transformer.

15.3. DC–DC converter applications

This section presents two PBL DC–DC converter application projects. The first one is an off-grid PV-powered LED street light, and the second one is a grid-connected LED street light. In addition to this chapter, senior-level power electronics textbooks [1–4] can be used to help gain a comprehensive understanding of the DC–DC converters needed for the two PBL projects presented here, and Refs [5–8] present an in-depth analysis of these two PBL application projects.

15.3.1. Off-grid PV powered LED street light

In the first PBL application project, PV panels are used to power an off-grid LED street light, so there is a need for the development of a switch-mode DC–DC converter system to power the LED street light from the solar panel. A buck, buck–boost, or SEPIC converter topology can be used to step down and regulate the solar panel output voltage from 22–26 V to the 12 V battery voltage, and a boost, buck–boost, or SEPIC topology can be used to step up the 12 V battery output voltage to 18 V needed for a set of series-connected high brightness LED loads. During the day, solar energy is delivered from the PV panel to the battery in charging mode. During the night-time, the boost converter delivers energy to the LEDs. Figure 15.1 presents this PBL project as a block diagram.

Figure 15.1 DC–DC converter application: photovoltaic powered street light.

15.3.2. Grid-connected hybrid LED street light

In this BPL project, PV panels are used to power a grid-connected LED street light, and the electric grid is used as an alternative source of energy for the system when the sun is not out for a period of time beyond the capability of the batteries to serve as a backup source. The design of a high brightness (HB) LED with built-in converter that can be connected directly to the AC line requires isolated DC–DC converters, so a flyback or isolated SEPIC topology can be used here. Off-the-shelf LED lights take advantage of the high efficiency of HB LEDs but not solar energy. The hybrid HB LED-based street light design PBL presented here incorporates an automatic transfer switch, as given in Figure 15.2. Through the use of this switch, the hybrid system uses solar energy as the primary source, and it switches to the AC line only for the time when the primary source cannot supply the required power to the illumination system. In the system given in Figure 15.2, LEDs are powered from the solar panel during the daytime as the primary source, with the battery in charge mode, and they operate from the battery at night. If the battery is fully discharged, the LED system operates from the AC line as a back-up source.

Figure 15.2 Hybrid high brightness LED illumination system.

15.4. Buck converter

Buck converters are nonisolated switched-mode step-down DC–DC converters; the DC input voltage at the source is periodically chopped through the use of an electronic switch operating at a set frequency, and the resulting pulsated signal is filtered out and thus the load is operated at an average voltage value that is less than the input voltage. The output voltage level at the load is controlled by varying (modulating) the width of the switch chopped input pulse, which is basically controlling the duration of the time the electronic switches, MOSFETs, are ON or OFF in one cycle of the operating frequency; this is known as pulse width modulation.

Buck converters use a transistor–diode switching network; this configuration employs the transistor S_w as the main switch and the diode D_d as the freewheeling path for the inductor current. The ratio between the time the transistor is ON (pulse width) and one cycle is the duty cycle or duty ratio D. For a buck converter, the duty cycle or the gain is less than 1 making the output voltage below the input level. Figure 15.3 shows a breakdown of a conventional buck converter consisting of a DC input voltage, a switching network of a transistor–diode implementation, an L–C filtering bank, and a load resistor along with the voltage signal variation from the input side down to the load.

Figure 15.3 A conventional buck converter and associated voltage signals.

Buck converter efficiency can be improved by replacing the diode in the transistor–diode switching network with a second transistor; this configuration employs the transistor S_w1 as the main switch and a second transistor S_w2 as the freewheeling path for the inductor current. The resulting topology is known as the synchronous buck converter topology. The synchronous buck converter topology has higher efficiency than the standard buck converter topology due to the reduced conduction losses resulting from replacing the diode with a transistor.

15.4.1. Steady-state analysis

The buck converter alternates between two circuit modes depending on the switch control. Assuming ideal switch operation over a period of T seconds, when the controller switches the transistor S_w ON (short circuit), the diode D_d is in the reverse biased (OFF) state and not conducting current (open circuit) as shown in Figure 15.4a. This is the charging mode of the buck where the inductor current linearly increases from an initial minimum value I_Lmin at steady state to a maximum value I_Lmax with a constant inductor voltage of V_L = V_in − V_out. The duration of this mode is DT_sec where D is the duty cycle.

Figure 15.4 Buck converter.
(a) Charging mode main switch ON and (b) discharging mode main switch OFF.

After the transistor is switched off (open circuit), the built-up current in the inductor needs to discharge forcing the diode to conduct (short circuit). The converter moves from the charging mode of Figure 15.4a to the discharge mode of Figure 15.4b in which the inductor current linearly decreases from the peak value reached at the end of the charging mode back to the original initial value, during which the voltage across the inductor is V_L = −V_o. The duration of the discharge mode is the remainder of the cycle, which is (1 − D)T_sec. The cycle repeats and the converter enters the charging mode again by switching the transistor back ON comprising the frequency at which the converter operates of 1/T Hz. The signals of the voltage across and the current through the inductor are depicted in Figure 15.5.

Figure 15.5 Buck converter voltage and current waveforms.

The output voltage V_o as a function of the input voltage V_in and the duty cycle D can be easily derived using the volt–second balance rule applied on the inductor, which states that the average voltage over one period across the inductor has to be zero. This is implemented by taking the algebraic sum of the product of the voltage across the inductor during charging (V_L = V_in − V_o in volts) multiplied by the time duration of the charging interval (DT in seconds), and the product of the voltage across the inductor during discharging (V_L = −V_o in volts) multiplied by the time duration of the discharging interval (1 – D)T_sec and equating them to zero. Applying the volt–second rule on the inductor of a buck converter will result in:

$(V_{in} - V_{o}) D T + (- V_{o}) (1 - D) T = 0$ $(V_{in} - V_{o}) D T + (- V_{o}) (1 - D) T = 0$

which is simplified to give the gain of the step-down buck converter in Equation (15.1).

$V_{o} = (D) V_{in}$ $V_{o} = (D) V_{in}$

(15.1)

The input current and the inductor and capacitor currents are all shown in Figure 15.5. The input current changes from i_in = i_L in DT seconds during the charging mode into i_in = 0 throughout the rest of the period of (1 – D)T seconds during the discharge mode with an average value less than the inductor average current of I_L = I_o = V_o/R. The ripple across the inductor current varies from i_Lmax to i_Lmin. Derivation of the maximum and minimum inductor currents is well established and it is sufficient to list them in Equations (15.2) and (15.3):

$I_{Lmin} = D V_{in} (\frac{1}{R} - \frac{(1 - D) T}{2 L})$ $I_{Lmin} = D V_{in} (\frac{1}{R} - \frac{(1 - D) T}{2 L})$

(15.2)

$I_{Lmax} = D V_{in} (\frac{1}{R} + \frac{(1 - D) T}{2 L})$ $I_{Lmax} = D V_{in} (\frac{1}{R} + \frac{(1 - D) T}{2 L})$

(15.3)

Figure 15.5 shows the continuous conduction mode (CCM) operation of buck converters, where the inductor current is continuously present and circulating. If the energy stored in the inductor was completely discharged before switching the main power back on, then the minimum inductor current will reach zero, and the converter is said to be operating in the discontinuous conduction mode (DCM).

The boundary between CCM and DCM operations is set by a specific inductor value known as the critical inductor value C_critical at which the minimum inductor current hits zero before charging again, this is simply found in equation (15.4) by solving for the value of the inductor that forces the minimum inductor current to zero:

$\begin{array}{l} I_{L \min} |_{L = L_{critical}} = 0 \\ I_{L \min} |_{L = L_{critical}} = D V_{in} (\frac{1}{R} - \frac{(1 - D) T}{2 L}) \\ L_{critical} = (\frac{1 - D}{2}) T R \end{array}$ $\begin{array}{l} I_{L \min} |_{L = L_{critical}} = 0 \\ I_{L \min} |_{L = L_{critical}} = D V_{in} (\frac{1}{R} - \frac{(1 - D) T}{2 L}) \\ L_{critical} = (\frac{1 - D}{2}) T R \end{array}$

(15.4)

Choosing inductors of greater values than the critical value places the converter into CCM operation, whereas inductors less than the critical value drive the operation into DCM.

The large output capacitor smoothes out the variation ∆V_o on the output voltage and keeps it constant at V_o. The allowed ripple as a ratio of the desired constant output voltage

(∆ V_{o} / V_{o})

$(∆ V_{o} / V_{o})$

determines the value of the capacitor filter needed as given in Equation (15.5):

$C = \frac{1 - D}{8 L (∆ V_{o} / V_{o}) f^{2}}$ $C = \frac{1 - D}{8 L (∆ V_{o} / V_{o}) f^{2}}$

(15.5)

15.5. Boost converter

The DC–DC converter that powers an output load with a voltage level larger than the input source is called the boost (step-up) converter. This boost in the output voltage is achieved by placing the inductor before the switching network as in Figure 15.6.

Figure 15.6 A conventional boost converter topology.

15.5.1. Steady-state analysis

Unlike the buck, during the charging mode of the boost converter the load is disconnected and the inductor is linearly charged through the constant input voltage for DT seconds. For the rest of the period of (1 − D)T seconds the inductor discharges through the load while the input source is powering the circuit. The two modes of operation of the boost converter are shown in Figure 15.7a,b and the voltage and current waveforms are depicted in Figure 15.8.

Figure 15.7 Boost converter.
(a) Charging mode main switch ON and (b) discharging mode main switch OFF.

Figure 15.8 Boost converter voltage and current waveforms.

The analysis of the boost converter follows the same procedure as the buck and the results are discussed later.

Applying the volt–second balance rule on the inductor results in the gain of the boost converter given in Equation (15.6) where the output voltage exceeds the input by the factor

1 / (1 - D)

$1 / (1 - D)$

$V_{o} = \frac{V_{in}}{1 - D}$ $V_{o} = \frac{V_{in}}{1 - D}$

(15.6)

The input current, which is the same as the inductor current along with the capacitor current, is shown in Figure 15.8. In this case the average input current, which is the inductor average current, is given in Equation (15.7) and derived from equating the input and the output powers:

$I_{L} = I_{in} = \frac{V_{o} \times I_{o}}{V_{in}} = \frac{I_{o}}{(1 - D)} = \frac{V_{in}}{{(1 - D)}^{2} \times R} = \frac{V_{o}^{2}}{V_{in} \times R}$ $I_{L} = I_{in} = \frac{V_{o} \times I_{o}}{V_{in}} = \frac{I_{o}}{(1 - D)} = \frac{V_{in}}{{(1 - D)}^{2} \times R} = \frac{V_{o}^{2}}{V_{in} \times R}$

(15.7)

The ripple across the inductor current varies from I_Lmax to I_Lmin as in Equations (15.8) and (15.9):

$I_{Lmin} = V_{in} (\frac{1}{R \times {(1 - D)}^{2}} - \frac{D T}{2 L})$ $I_{Lmin} = V_{in} (\frac{1}{R \times {(1 - D)}^{2}} - \frac{D T}{2 L})$

(15.8)

$I_{L max} = V_{in} (\frac{1}{R \times {(1 - D)}^{2}} + \frac{D T}{2 L})$ $I_{L max} = V_{in} (\frac{1}{R \times {(1 - D)}^{2}} + \frac{D T}{2 L})$

(15.9)

The boundary between CCM and DCM is set by the critical value of the inductor given in Equation (15.10). Inductor values greater than L_critical set the boost operation in CCM.

$L_{critical} = \frac{D {(1 - D)}^{2} \times R}{2 f}$ $L_{critical} = \frac{D {(1 - D)}^{2} \times R}{2 f}$

(15.10)

The allowed ripple as a ratio of the desired constant output voltage

(∆ V_{o} / V_{o})

$(∆ V_{o} / V_{o})$

determines the value of the capacitor filter needed as given in Equation (15.11):

$C = \frac{D}{R \times (∆ V_{o} / V_{o}) \times f}$ $C = \frac{D}{R \times (∆ V_{o} / V_{o}) \times f}$

(15.11)

15.6. Buck–boost converter

Buck–boost converters are nonisolated switch-mode step-up or step-down DC–DC converters; the DC input voltage at the source is stepped up or down through the use of an electronic switch, the resulting pulsated signal is filtered out, and thus the load is operated at an average voltage value that is either greater or less than the input voltage. The output voltage level at the load is controlled by varying (modulating) the width of the input pulse, which is basically controlling the duration of the time the electronic switch is ON. If the duty ratio is greater than 0.5, the input voltage is stepped up (boost mode); if the duty ratio is less than 0.5, the input voltage is stepped down (buck mode).

Buck–boost converters use a transistor–diode switching network in a configuration that employs a MOSFET as the switch and a diode as the freewheeling path for the inductor current when the MOSFET is off. The ratio between the time the transistor is ON and one period is the duty ratio. For a buck–boost converter, the gain is less than 1 when the duty ratio is less than 0.5 making the output voltage below the input level, and it is greater than 1 when the duty ratio is higher than 0.5 making the output voltage level higher than the input voltage level. Figure 15.9 shows the conventional buck–boost converter topology [3]. The diode can be replaced by a second switch resulting in the more efficient synchronous buck–boost topology.

Figure 15.9 A conventional buck–boost converter topology [3].

15.6.1. Steady-state analysis

A buck–boost converter alternates between two circuit modes depending on the status of the switch. The same analysis strategy followed for the buck and boost converters applies for the buck–boost converter, and detailed analysis of this converter is presented in [1–3]. Assuming ideal switch operation over a period of T seconds, when the controller switches the MOSFET ON (short circuit), the diode is in the reverse biased (OFF) state and not conducting current (open circuit) as shown in Figure 15.10a. This is the charging mode of the buck–boost converter where the inductor current linearly increases from an initial minimum value I_Lmin at steady state to a maximum value I_Lmax.

Figure 15.10 Buck–boost converter circuits.
(a) Charging mode and (b) discharging mode [3].

The output voltage V_o as a function of the input voltage V_in and the duty cycle D can be easily derived using the volt–second balance rule applied on the inductor. This is implemented by taking the algebraic sum of the product of the voltage across the inductor during charging multiplied by the time duration of the charging interval (DT in seconds), and the product of the voltage across the inductor during discharging multiplied by the discharging interval (1 – D)T_sec and equating them to zero. Applying the volt–second rule on the inductor of the buck–boost converter will give the gain of the buck–boost converter in Equation (15.12). For the buck–boost converter, there is a polarity reversal between the input and output voltages.

$\frac{V_{o}}{V_{in}} = \frac{D}{1 - D}$ $\frac{V_{o}}{V_{in}} = \frac{D}{1 - D}$

(15.12)

The maximum and minimum inductor currents for the buck–boost are listed in Equations (15.13) and (15.14):

$I_{L, max} = V_{in} [\frac{D}{R {(1 - D)}^{2}} + \frac{D T}{2 L}]$ $I_{L, max} = V_{in} [\frac{D}{R {(1 - D)}^{2}} + \frac{D T}{2 L}]$

(15.13)

$I_{L, min} = V_{in} [\frac{D}{R {(1 - D)}^{2}} - \frac{D T}{2 L}]$ $I_{L, min} = V_{in} [\frac{D}{R {(1 - D)}^{2}} - \frac{D T}{2 L}]$

(15.14)

The CCM operation of the buck–boost converter is well established. In CCM operation, the inductor current is continuously present and circulating.

The allowed ripple as a ratio of the desired constant output voltage

(∆ V_{o} / V_{o})

$(∆ V_{o} / V_{o})$

determines the value of the capacitor filter needed for the buck–boost converter and is:

$C = \frac{D}{R \times (∆ V_{o} / V_{o}) \times f}$ $C = \frac{D}{R \times (∆ V_{o} / V_{o}) \times f}$

(15.15)

15.7. SEPIC converter

Basic switch-mode DC–DC converters suffer from a high current ripple. This creates harmonics. In many applications, these harmonics necessitate using an LC filter. Another issue that can complicate the usage of the buck–boost converter topology is the fact that it inverts the voltage. Ćuk converters solve the harmonics problem by using an extra capacitor and inductor. However, both Ćuk and buck–boost converters reverse the voltage polarity of the input voltage and cause large amounts of electrical stress on the components, and this can result in device failure or overheating. SEPIC converters solve both of these problems.

SEPIC is a step-up or step-down converter. SEPIC converter topology, given in Figure 15.11, is a DC–DC converter topology that provides a low harmonic content positive regulated output voltage from an input voltage that varies above and below the output voltage. The standard SEPIC topology uses two inductors and two capacitors, so it is not considered a basic DC–DC converter topology. Two inductors of equal values can be used as a 1:1 transformer as in Figure 15.12. Coupled inductors are available in a single package at a cost only slightly more than that of the comparable single inductor. The coupled inductors not only provide a smaller footprint but also, to get the same inductor ripple current, require only half the inductance needed for a SEPIC with two separate inductors.

Figure 15.11 Standard nonisolated SEPIC converter topology [4].

Figure 15.12 Isolated SEPIC converter topology [4].

15.7.1. SEPIC steady-state analysis in continuous conduction mode

Applying Kirchhoff’s voltage law around the path V_s, L₁, C₁, and L₂ in Figure 15.11, when the switch is open, gives

- V_{s} + v_{L_{1}} + v_{C_{1}} - v_{L_{2}} = 0

$- V_{s} + v_{L_{1}} + v_{C_{1}} - v_{L_{2}} = 0$

. Using the average of these voltages, the voltage across capacitor C₁ is

V_{C_{1}} = V_{s}

$V_{C_{1}} = V_{s}$

. When the switch is closed, the voltage across L₁ during DT is

v_{L_{1}} = V_{s}

$v_{L_{1}} = V_{s}$

. When the switch is open, applying KV around the outermost path gives

- V_{s} + v_{L_{1}} + v_{C_{1}} + V_{o} = 0

$- V_{s} + v_{L_{1}} + v_{C_{1}} + V_{o} = 0$

. Assuming the voltage across C₁ remains constant, then

v_{L_{1}} = - V_{o}

$v_{L_{1}} = - V_{o}$

for a time period of (1 – D)T. Using the voltage across the inductor of zero for a periodic operation then

V_{s} D T - V_{o} (1 - D) T = 0

$V_{s} D T - V_{o} (1 - D) T = 0$

where D is duty ratio of the switch. Then

V_{o} = V_{s} (D / 1 - D)

$V_{o} = V_{s} (D / 1 - D)$

, which is expressed as

D = V_{o} / (V_{o} + V_{s})

$D = V_{o} / (V_{o} + V_{s})$

. This is similar to the buck–boost and Cuk converter equations, but with no reverse polarity.

The variation in

i_{L_{1}}

$i_{L_{1}}$

when the switch is closed is

v_{L_{1}} = V_{S} = L_{1} (∆ i_{L_{1}} / D T)

$v_{L_{1}} = V_{S} = L_{1} (∆ i_{L_{1}} / D T)$

. On solving for

∆ i_{L_{1}}

$∆ i_{L_{1}}$

we get

∆ i_{L_{1}} = V_{S} D T / L_{1} = V_{S} D / L_{1} f

$∆ i_{L_{1}} = V_{S} D T / L_{1} = V_{S} D / L_{1} f$

. For L₂, the average current is determined from Kirchhoff’s current law at the node where L₁, C₂, and the diode are connected,

i_{L_{2}} = i_{D} - i_{C_{1}}

$i_{L_{2}} = i_{D} - i_{C_{1}}$

and the diode current is

i_{D} = i_{C_{2}} + I_{o}

$i_{D} = i_{C_{2}} + I_{o}$

The output stage consisting of diode, C₂ and resistor is same as boost converter and so the output voltage ripple is:

∆ V_{o} = V_{C_{2}} = (V_{o} D) / (R C_{2} f)

$∆ V_{o} = V_{C_{2}} = (V_{o} D) / (R C_{2} f)$

. The voltage variation in C₁ is determined from the circuit with switch closed. Capacitor C₁ current has an average value of Io where,

∆ V_{C_{1}} = (∆ Q_{C_{1}} / C) = (I_{o} D T / C)

$∆ V_{C_{1}} = (∆ Q_{C_{1}} / C) = (I_{o} D T / C)$

. Replacing with I_o with V_o/R result in

∆ V_{C_{1}} = V_{o} D / R C_{1} f

$∆ V_{C_{1}} = V_{o} D / R C_{1} f$

15.8. Summary

This chapter covered nonisolated switch-mode DC–DC converters. First, two application PBL projects were presented to show the importance of understanding the material presented in this chapter. Then, the three basic nonisolated switch-mode DC–DC converter topologies were presented.

The basic DC–DC converter topologies should be considered first when selecting a DC–DC converter for any application due to their simplicity, smaller size, and lower cost. The designer should try first to choose the buck converter if a voltage step down is needed or the boost converter if a voltage step up is needed for the design. If there is a need for a voltage step up and step down in the same converter, the first choice should be the buck–boost converter. If the design requirements cannot be met using any of the three basic nonisolated switch-mode converters, SEPIC should be the next option to be considered. If a higher efficiency is required, synchronous converters with the diode replaced by a second switch should be considered for the design implementation.

If a high isolation level is required, an isolated switch-mode DC–DC converter needs to be considered. The flyback converter is a good choice in this case. The flyback converter is a buck–boost converter with the inductor split to form a transformer to provide a higher level of electrical isolation between the input and the output. The input to output voltage gain ratio of the buck–boost topology is multiplied by the transformer turns ration to achieve the isolated switch-mode DC–DC flyback converter gain, and there is an additional advantage of input to output isolation. The analysis of the flyback converter topology is similar to the buck–boost converter topology, and Refs [1–4] present complete analysis of isolated switch-mode DC–DC converters.

Problems

1. A buck converter has the following parameters: V_i = 15 V, V_o = −9 V, L = 10 μH, C = 50 μF, and R = 5 Ω. The switching frequency is 150 kHz. Determine the duty ratio, the maximum inductor current, and the output voltage ripple.

2. A buck converter has an input of 6 V and an output of 1.5 V. The load resistor is 3 Ω, the switching frequency is 400 kHz, L = 5 μH, and C = 10 μF. Determine the peak inductor current and the peak and average diode current.

3. A boost converter has an input of 12 V and an output of 24 V. The switching frequency is 100 kHz, and the output power to a load resistor is 125 W. Determine the duty ratio and the capacitance value to limit the output voltage ripple to 0.5%.

4. A buck–boost converter has the following parameters: V_i = 24 V, output voltage = −15.6 V, L = 25 μH, C = 15 μF, and R =10 Ω. The switching frequency is 1 MHz. Determine the maximum inductor current and the output voltage ripple.

5. Design a buck–boost converter to produce an output voltage of –15 V across a 10-Ω load resistor. The operating frequency is 0.5 MHz and the output voltage ripple must not exceed 0.5%. The DC supply is 45 V. Design for a continuous inductor current. Calculate the value of the capacitor and the peak voltage rating of the MOSFET.

6. Design a SEPIC converter to produce an output voltage of 12 V from an input voltage of 18 V. The output power is 10 W and the operating frequency is 1 MHz. The output voltage ripple must not exceed 100 mVpp. If two 50 mH inductors are used for the converter design, calculate the value of the capacitors and the MOSFET and diode ratings.

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Abstract

Keywords

15.1. Introduction

15.2. Basic nonisolated switch-mode DC–DC converters

15.3. DC–DC converter applications

15.3.1. Off-grid PV powered LED street light

15.3.2. Grid-connected hybrid LED street light

15.4. Buck converter

15.4.1. Steady-state analysis

15.5. Boost converter

15.5.1. Steady-state analysis

15.6. Buck–boost converter

15.6.1. Steady-state analysis

15.7. SEPIC converter

15.7.1. SEPIC steady-state analysis in continuous conduction mode

15.8. Summary

Table of Contents for
15: DC–DC converters