Index
Note: Page numbers followed by f indicate figures and t indicate tables.
A
AML interpreter 44
C state 46–48
definition 44
EIST 45
P states 45–46
T states 44–45
calling conventions 215–216
definition 214
natural alignment 215
Array of structures (AOS) 267–269
Asymmetric mode 50
B
BIU See Bus interface unit (BIU)
CMP instruction 245
conditional branch 239
optional code 241
prediction accuracy 240–241
profile guided optimization 246–247
shift instructions 242
speculative execution 239–240
unconditional branch 239
Bus interface unit (BIU) 6–7
C
associative cache 251
cache hit 249
cache line 251–252
cache miss 249
CPUID 253–256
data locality 257–259
dcache 251
icache 251
level 1 (L1) cache 251
level 2 (L2) cache 251
level 3 (L3) cache 251
prefetching 256–257
sysfs interface 256
temporal data locality 249
CFLAGS See Compiler flags (CFLAGS)
Clock time 82–84
algorithmic/microarchitectural analyses 123
analysis type 123
command-line interface 123–124
configuration 125–127
results directory 124
XML file 123
analysis type See (Collect action)
apitrace 185
callstacks report type 128
finalize action 127
general-exploration analysis 128–129
gprof-cc report type 128
hotspots report type 128
Phoronix Test Suite 87–88
result-dir arguments 127–128
summary report type 128
sysprof-module 200
top-down report type 128
Complex Instruction Set Computer (CISC) 35–36
CPU migrations 76–77
disk performance, variability of 75
HTML page 74–75
microbenchmarks 74
mmap(2) system call 76
noisy system 77
P and C states 76
remote resources 75
tmpfs file 75–76
Control unit (CU) 20
code snippet 82
frequency 80
CPUID 217–220
Procfs 221–222
runtime dispatching 222–225
CRC32 275
downloads.xml 96
install.sh script 96–97
new directory 95
results-definition.xml file 97
support-check.sh script 96
test-definition.xml file 95–96
D
analysis type See (Collect action)
buGLe 182
command line interface 123
finalize action 127
graphical interface 122
kernelshark tool 175
LatencyTOP 199
perf tool 156–163
trace and trace_pipe file 168
available_tracers file 168
busybox 166
current_tracer file 168
function and function_graph tracers 168–171
mount(1) command 167
nop tracer 174
trace and trace_pipe files 168
batchbuffer 180
GEM 180
KMS support 180
E
Enhanced Intel SpeedStep® technology (EIST) 45
APIC interrupt 106
bottleneck 107
edge detect bit 106
fixed-function 105
interface and hardware 105
microarchitectural performance analysis 107
MSR format 106
PEBS 106
programmable counters 107
user and operating system modes 106
executable files 209
execution view 210
linking view 209–210
PIC 210–214
relocatable files 209
shared object files 209
controllable See (Controllable external variables)
uncontrollable 77–79
F
Flex Memory technology 49–50
Floating point unit (FPU) 20
dynamic tracepoints 165–166
events 165
Linux distributions See (DebugFS)
static tracepoints 165–166
function_graph tracer 168–171
function tracer 168–171
G
GEM See Graphics Execution Manager (GEM)
bisect 62–63
Global descriptor table (GDT) 22
Global Offset Table (GOT) 212–213
GNU code coverage (gcov) 192–193
GNU compiler toolchain (GCC) See Toolchains
binary data file 190
compiler support 189
flat profile 190
gcov 192–193
graph profile 190–192
limitations 192
workload testing 189–190
GOT See Global Offset Table (GOT)
GPU See Graphics processing unit (GPU)
analysis type See (Collect action)
finalize action 127
Phoronix Test Suite 87–88
report action 129–132
sysprof-module 200
Graphics Execution Manager (GEM) 180
buGLe 182–185
cairo 181–182
DRI 179–180
Mesa 180–181
pixman 182
Xlib/XCB library 178–179
GUI See Graphical user interface (GUI)
I
C99 support 19
development 16
formats, precision, and environment 18–19
scientific notation 17
IFUNC 224–225
BIU 6–7
boolean logic 12
data movement 11
execution unit 6–7
flow control 12
general purpose registers 8–9
IBM compatible PC 6
integer arithmetic 11–12
operands 10–11
principles 5–6
ROM and BIOS 10
SDM 5
status registers 9–10
system state 7–8
common and error-prone computations 16
IEEE 754 standard See (IEEE 754 floating point)
x87 floating point 19–20
Intel® Advanced Vector Set Extensions (Intel® AVX) 263–264
Intel® AES New Instructions (AES-NI) 273–274
MMU 20–21
protected and real mode 21
protected mode segmentation 21–22
task control 22–23
32-bit mode 24–26
Linux kernel splits 28
Linux project 23–24
logical and linear addresses 26
page frame 26
PDE and PTE 26–27
TLB 27–28
Virtual 8086 mode 24
Flex Memory technology 49–50
Intel HD graphics 49
RAPL 51–52
Turbo Boost technology 50–51
Intel® Graphics Media Accelerators (GMA) 49
Intel Hyper-Threading Technology 41
Hyper-Threading 41
IA-32e mode 38–40
multi-core processor 40–41
P6 microarchitecture 38
Intel® Pentium® M processor See Advanced Configuration and Power Interface(ACPI) specification
µops 35–36
out-of-order execution 36–38
PAE 34–35
P6 architecture 34
P5 microarchitecture 32
SIMD 32
superscalar 33–34
Intel® Thread Building Blocks (Intel® TBB) 262–263
apwr.ko driver 119
data collection See (Data collection)
installation 118
kernel modules 119–120
pax driver 118
reporting See (Report action)
sep driver 118
system configuration 120–121
vtsspp module 118–119
K
Kernel Mode Setting (KMS) support 180
L
LatencyTOP 199–200
libdrm 180–181
Linux dynamic tracepoints 165–166
dynamic tracepoints 165–166
events 165
Linux distributions See (DebugFS)
static tracepoints 165–166
counting events 146–150
event selection See (perf event)
perf stat 158
sampling events 150–156
Linux static tracepoints 165–166
LLC See Last Level Cache (LLC)
Local descriptor table (LDT) 22
L-shaped memory configuration 50
M
CMP encoding 15–16
opcode 13
variable length 13
Memory Type Range Registers (MTRR) 252
Microcode Sequencer 111
Micro-ops (µops) See Top-down hierarchical analysis
N
Non-Uniform Memory Access (NUMA) 40
nop tracer 174
Numeric execution unit (NEU) 20
O
buGLe 182–185
Mesa 180–181
advantages 59–60
development method 59
Git See (Git)
Linux distributions 60
results 61–62
P
Packed carry-less multiplication (PCLMUL) 274–275
Page Attribute Table (PAT) 252
Page directory entry (PDE) 26–27
Page table entry (PTE) 26–27
COW 262
Hyper-Threading 41
INTEL® 8086 5–6
Intel® TBB library 262–263
vectorization See (Single Instruction Multiple Data (SIMD) instruction)
PCLMUL See Packed carry-less multiplication (PCLMUL)
PDE See Page directory entry (PDE)
PDPT See Page directory pointer table (PDPT)
data structure 137
event types 138–139
perf_event.h header file 138
PERF_EVENT_TRACEPOINT 141
PERF_TYPE_HARDWARE 139
PERF_TYPE_SOFTWARE 141
perf_event_attr.size field 143
architectural/nonarchitectural events 104
collection methodology 105
.CORE/.THREAD counts 104
event counters See (Event counters)
top-down method See (Top-down hierarchical analysis)
VTune See (Intel® VTune™ Amplifier XE)
algorithmic tuning 67–68
architectural tuning 68–70
bottleneck 57
problem solving 54–56
reproducible experiment 57–59
testing 70–71
upstream See (Open source project)
perf stat 158
counting events 146–150
event selection See (perf event)
perf stat 158
sampling events 150–156
advantages 85
batch mode 94
commands 89
configuration 90
customs See (Custom tests)
directory 90
execution 92–94
installation 91–92
local tests and pts 89–90
OpenBenchmarking website 89
resources 98–100
test results 94–95
Physical Address Extensions (PAE) 34–35
Pipeline hazards 33
PLT See Procedure Linkage Table (PLT)
Position Independent Code (PIC) 9
ABI 214–216
CALL instruction 213
dynamic linking 211–212
GOT 212–213
LD_LIBRARY_PATH environmental variable 214
LD_PRELOAD environment variable 214
PLT 212–213
relocatable code 212
static linking 210–211
writable code pages 213
ncurses-based interface 193
power consumption 193
Precise Event Based Sampling (PEBS) 106
Procedure Linkage Table (PLT) 212–213
Process scheduling 23
buGLe tool 182–185
definition 103
monitors 104
PTE See Page table entry (PTE)
Q
Qapitrace 185
R
Reduced Instruction Set Computer (RISC) 35–36
command-line interface 127–129
graphical interface 129–132
Running Average Power Limit (RAPL) 51–52
S
Scale-index-base(SIB) byte 25
architectural tuning 68
data alignment 265–266
Intel® AVX 263–264
MOVDQA and MOVDQU instructions 264–265
Pentium processor 32
SSE 263
vectorized and nonvectorized implementation 266–267
VMOVDQA and VMOVDQU instructions 264–265
Software Developer Manual (SDM) 5
Spatial locality 257–259
Streaming SIMD Extensions (SSE) 263
const qualifier 229
LatencyTOP 199–200
SSE4.2 275–276
Structure of arrays (SOA) 269–270
T
Temporal locality 257–259
Tick Tock model 44
clock time 82–84
cycle See (CPU cycles)
monotonically increasing timer 79
process time 80
Unix time 82–84
wall time 80
assembler 206
const qualifier 229
function dispatch See (CPU dispatch)
linker 206
loop unrolling 231
natural alignment 230–231
pointer aliasing 226–228
signed and unsigned qualifiers 228–229
standalone assembly 232–234
volatile qualifier 229
x86 and x86_64 architectures See (Executable and Linkable Format (ELF))
bottleneck 107
Core Bound 114–115
Memory Bound 112–114
pipeline slot 108
retiring 115–116
current_tracer file 168
function and function_graph tracers 168–171
nop tracer 174
trace and trace_pipe files 168
tracing_on controls 168
Translation Lookaside Buffer (TLB) 27–28
TSC See Time-stamp (TSC) counter
Turbo Boost technology 50–51
U
Unconditional branch 239
data points 77
estimator 78
implementation 78–79
standard deviation 78
Unix time 82–84
V
VTune See Intel® VTune™ Amplifier XE
X
x87 floating point 19–20
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